@ifset HPPA
* HPPA ELF32:: ld and HPPA 32-bit ELF
@end ifset
+@ifset M68HC11
+* M68HC11/68HC12:: ld and the Motorola 68HC11 and 68HC12 families
+@end ifset
@ifset TICOFF
* TI COFF:: ld and the TI COFF
@end ifset
for libraries that satisfy some reference from regular objects.
@option{--no-as-needed} restores the default behaviour.
+@kindex --add-needed
+@kindex --no-add-needed
+@item --add-needed
+@itemx --no-add-needed
+This option affects the treatment of dynamic libraries from ELF
+DT_NEEDED tags in dynamic libraries mentioned on the command line after
+the @option{--no-add-needed} option. Normally, the linker will add
+a DT_NEEDED tag for each dynamic library from DT_NEEDED tags.
+@option{--no-add-needed} causes DT_NEEDED tags will never be emitted
+for those libraries from DT_NEEDED tags. @option{--add-needed} restores
+the default behaviour.
+
@kindex -assert @var{keyword}
@item -assert @var{keyword}
This option is ignored for SunOS compatibility.
@ifset XTENSA
@xref{Xtensa,, @command{ld} and Xtensa Processors}.
@end ifset
+@ifset M68HC11
+@xref{M68HC11/68HC12,,@command{ld} and the 68HC11 and 68HC12}.
+@end ifset
On some platforms, the @samp{--relax} option performs global
optimizations that become possible when the linker resolves addressing
created. By default, the new dynamic tags are not created. Note that
those options are only available for ELF systems.
+@kindex --hash-size=@var{number}
+Set the default size of the linker's hash tables to a prime number
+close to @var{number}. Increasing this value can reduce the length of
+time it takes the linker to perform its tasks, at the expense of
+increasing the linker's memory requirements. Similarly reducing this
+value can reduce the memory requirements at the expense of speed.
+
+@kindex --reduce-memory-overheads
+@item --reduce-memory-overheads
+This option reduces memory requirements at ld runtime, at the expense of
+linking speed. This was introduced to to select the old O(n^2) algorithm
+for link map file generation, rather than the new O(n) algorithm which uses
+about 40% more memory for symbol storage.
+
+Another affect of the switch is to set the default hash table size to
+1021, which again saves memory at the cost of lengthening the linker's
+run time. This is not done however if the @option{--hash-size} switch
+has been used.
+
+The @option{--reduce-memory-overheads} switch may be also be used to
+enable other tradeoffs in future versions of the linker.
+
@end table
@c man end
@c man end
+@ifset M68HC11
+@subsection Options specific to Motorola 68HC11 and 68HC12 targets
+
+@c man begin OPTIONS
+
+The 68HC11 and 68HC12 linkers support specific options to control the
+memory bank switching mapping and trampoline code generation.
+
+@table @gcctabopt
+
+@kindex --no-trampoline
+@item --no-trampoline
+This option disables the generation of trampoline. By default a trampoline
+is generated for each far function which is called using a @code{jsr}
+instruction (this happens when a pointer to a far function is taken).
+
+@kindex --bank-window
+@item --bank-window @var{name}
+This option indicates to the linker the name of the memory region in
+the @samp{MEMORY} specification that describes the memory bank window.
+The definition of such region is then used by the linker to compute
+paging and addresses within the memory window.
+
+@end table
+
+@c man end
+@end ifset
+
@ifset UsesEnvVars
@node Environment
@section Environment Variables
Discarding}.
@node Output Section Address
-@subsection Output Section Description
+@subsection Output Section Address
@cindex address, section
@cindex section address
The @var{address} is an expression for the VMA (the virtual memory
@ifset MSP430
* MSP430:: @command{ld} and MSP430
@end ifset
+@ifset M68HC11
+* M68HC11/68HC12:: @code{ld} and the Motorola 68HC11 and 68HC12 families
+@end ifset
@ifset TICOFF
* TI COFF:: @command{ld} and TI COFF
@end ifset
@raisesections
@end ifclear
+@ifset M68HC11
+@ifclear GENERIC
+@raisesections
+@end ifclear
+
+@node M68HC11/68HC12
+@section @command{ld} and the Motorola 68HC11 and 68HC12 families
+
+@cindex M68HC11 and 68HC12 support
+
+@subsection Linker Relaxation
+
+For the Motorola 68HC11, @command{ld} can perform these global
+optimizations when you specify the @samp{--relax} command-line option.
+
+@table @emph
+@cindex relaxing on M68HC11
+@item relaxing address modes
+@command{ld} finds all @code{jsr} and @code{jmp} instructions whose
+targets are within eight bits, and turns them into eight-bit
+program-counter relative @code{bsr} and @code{bra} instructions,
+respectively.
+
+@command{ld} also looks at all 16-bit extended addressing modes and
+transforms them in a direct addressing mode when the address is in
+page 0 (between 0 and 0x0ff).
+
+@item relaxing gcc instruction group
+When @command{gcc} is called with @option{-mrelax}, it can emit group
+of instructions that the linker can optimize to use a 68HC11 direct
+addressing mode. These instructions consists of @code{bclr} or
+@code{bset} instructions.
+
+@end table
+
+@subsection Trampoline Generation
+
+@cindex trampoline generation on M68HC11
+@cindex trampoline generation on M68HC12
+For 68HC11 and 68HC12, @command{ld} can generate trampoline code to
+call a far function using a normal @code{jsr} instruction. The linker
+will also change the relocation to some far function to use the
+trampoline address instead of the function address. This is typically the
+case when a pointer to a function is taken. The pointer will in fact
+point to the function trampoline.
+
+@ifclear GENERIC
+@lowersections
+@end ifclear
+@end ifset
+
@node ARM
-@section @command{ld}'s Support for Interworking Between ARM and Thumb Code
+@section @command{ld} and the ARM family
@cindex ARM interworking support
@kindex --support-old-code
executables. This option is only valid when linking big-endian objects.
The resulting image will contain big-endian data and little-endian code.
+@cindex TARGET1
+@kindex --target1-rel
+@kindex --target1-abs
+The @samp{R_ARM_TARGET1} relocation is typically used for entries in the
+@samp{.init_array} section. It is interpreted as either @samp{R_ARM_REL32}
+or @samp{R_ARM_ABS32}, depending on the target. The @samp{--target1-rel}
+and @samp{--target1-abs} switches override the default.
+
+@cindex TARGET2
+@kindex --target2=@var{type}
+The @samp{--target2=type} switch overrides the default definition of the
+@samp{R_ARM_TARGET2} relocation. Valid values for @samp{type}, their
+meanings, and target defaults are as follows:
+@table @samp
+@item rel
+@samp{R_ARM_REL32} (arm*-*-symbianelf, arm*-*-elf, arm*-*-eabi)
+@item got-rel
+@samp{R_ARM_GOT_PREL} (arm*-*-linux, arm*-*-*bsd)
+@end table
+
@ifclear GENERIC
@lowersections
@end ifclear
the original names for the renamed symbols will be exported.
In effect, you'd be aliasing those symbols, not renaming them,
which is probably not what you wanted.
+
+@cindex weak externals
+@item weak externals
+The Windows object format, PE, specifies a form of weak symbols called
+weak externals. When a weak symbol is linked and the symbol is not
+defined, the weak symbol becomes an alias for some other symbol. There
+are three variants of weak externals:
+@itemize
+@item Definition is searched for in objects and libraries, historically
+called lazy externals.
+@item Definition is searched for only in other objects, not in libraries.
+This form is not presently implemented.
+@item No search; the symbol is an alias. This form is not presently
+implemented.
+@end itemize
+As a GNU extension, weak symbols that do not specify an alternate symbol
+are supported. If the symbol is undefined when linking, the symbol
+uses a default value.
@end table
@ifclear GENERIC
projects / deliverable / binutils-gdb.git / blobdiff