+2010-08-19 Alan Modra <amodra@gmail.com>
+
+ * ld-scripts/memory.t: Remove ORIGIN fudge.
+
+2010-08-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/11913
+ * ld-i386/discarded1.d: New.
+ * ld-i386/discarded1.s: Likewise.
+ * ld-i386/discarded1.t: Likewise.
+ * ld-x86-64/discarded1.d: Likewise.
+ * ld-x86-64/discarded1.s: Likewise.
+ * ld-x86-64/discarded1.t: Likewise.
+
+ * ld-i386/i386.exp: Run discarded1.
+ * ld-x86-64/x86-64.exp: Likewise.
+
+2010-08-09 Catherine Moore <clm@codesourcery.com>
+
+ * ld-mips-elf/mode-change-error-1.d: New.
+ * ld-mips-elf/mode-change-error-1a.s: New.
+ * ld-mips-elf/mode-change-error-1b.s: New.
+ * ld-mips-elf/mips-elf.exp: Run new test.
+
+2010-08-06 Alan Modra <amodra@gmail.com>
+
+ * ld-powerpc/tocopt.s, * ld-powerpc/tocopt.d: New test.
+ * ld-powerpc/powerpc.exp: Run it.
+
+2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com>
+ Ina Pandit <ina.pandit@kpitcummins.com>
+
+ * ld-v850/split-lo16.d: Update the "ld" instructions with a space
+ for second operand.
+
+2010-07-20 Alan Modra <amodra@gmail.com>
+
+ * ld-powerpc/tlsexe.r: Update.
+ * ld-powerpc/tlsexetoc.r: Update.
+ * ld-powerpc/tlsso.r: Update.
+ * ld-powerpc/tlstocso.r: Update.
+
+2010-07-20 Alan Modra <amodra@gmail.com>
+
+ * ld-powerpc/vxworks-relax.s: Add branches to match expected output.
+ * ld-powerpc/vxworks-relax-2.s: Likewise.
+ * ld-powerpc/vxworks1-lib.rd: Reorder reloc sections.
+
+2010-07-19 Andreas Schwab <schwab@redhat.com>
+
+ * ld-mmix/bspec1.d: Ignore "Key to Flags" contents.
+ * ld-mmix/bspec2.d: Likewise.
+ * ld-mmix/local1.d: Likewise.
+ * ld-mmix/local3.d: Likewise.
+ * ld-mmix/local5.d: Likewise.
+ * ld-mmix/local7.d: Likewise.
+ * ld-mmix/undef-3.d: Likewise.
+ * ld-sh/sh64/crange1.rd: Likewise.
+ * ld-sh/sh64/crange2.rd: Likewise.
+ * ld-sh/sh64/crange3-cmpct.rd: Likewise.
+ * ld-sh/sh64/crange3-media.rd: Likewise.
+ * ld-sh/sh64/crange3.rd: Likewise.
+ * ld-sh/sh64/crangerel1.rd: Likewise.
+ * ld-sh/sh64/crangerel2.rd: Likewise.
+
+2010-07-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/11817
+ * ld-i386/compressed1.s: New.
+ * ld-i386/compressed1.d: Likewise.
+ * ld-x86-64/compressed1.s: Likewise.
+ * ld-x86-64/compressed1.d: Likewise.
+
+ * ld-i386/i386.exp: Run compressed1.
+ * ld-x86-64/x86-64.exp: Likewise.
+
+2010-07-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/11812
+ * ld-elf/exclude3b.d: Don't run on ia64-*-*. Replace .got with
+ .dynamic.
+
+ * ld-elf/exclude3d.d: New.
+ * ld-i386/nogot1.d: Likewise.
+ * ld-i386/nogot1.s: Likewise.
+ * ld-x86-64/nogot1.d: Likewise.
+ * ld-x86-64/nogot1.s: Likewise.
+
+ * ld-i386/i386.exp: Run nogot1.
+ * ld-x86-64/x86-64.exp: Likewise.
+
+2010-07-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-i386/hidden2.d: Don't hard code expected output.
+ * ld-i386/protected3.d: Likewise.
+ * ld-x86-64/hidden2.d: Likewise.
+ * ld-x86-64/protected3.d: Likewise.
+
+2010-07-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/11791
+ * ld-ifunc/ifunc-10-i386.d: New.
+ * ld-ifunc/ifunc-10-i386.s: Likewise.
+ * ld-ifunc/ifunc-10-x86-64.d: Likewise.
+ * ld-ifunc/ifunc-10-x86-64.s: Likewise.
+ * ld-ifunc/ifunc-11-i386.d: Likewise.
+ * ld-ifunc/ifunc-11-i386.s: Likewise.
+ * ld-ifunc/ifunc-11-x86-64.d: Likewise.
+ * ld-ifunc/ifunc-11-x86-64.s: Likewise.
+
+2010-07-06 Alan Modra <amodra@gmail.com>
+
+ * ld-powerpc/relax.s: Add branch back to _start.
+ * ld-powerpc/relax.d: Update.
+ * ld-powerpc/relaxr.d: Update.
+
+2010-07-01 Alan Modra <amodra@gmail.com>
+
+ * lib/ld-lib.exp (default_ld_simple_link): Add $gcc_ld_flag before
+ any other options in $ld.
+
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * ld-maxq/maxq.exp: Delete file.
+ * ld-maxq/addend.dd, * ld-maxq/addend.s, * ld-maxq/paddr.dd,
+ * ld-maxq/paddr.s, * ld-maxq/paddr1.dd, * ld-maxq/paddr1.s,
+ * ld-maxq/r32-1.s, * ld-maxq/r32-2.s, * ld-maxq/r32.dd: Likewise.
+
+2010-06-15 Joseph Myers <joseph@codesourcery.com>
+
+ * ld-elf/orphan3.d: Allow section names starting '_'.
+ * ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
+ ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
+ ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
+ ld-tic6x/attr-arch-c62x.s, ld-tic6x/attr-arch-c64x+-c62x.d,
+ ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d,
+ ld-tic6x/attr-arch-c64x+-c674x.d,
+ ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
+ ld-tic6x/attr-arch-c64x+.s, ld-tic6x/attr-arch-c64x-c62x.d,
+ ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d,
+ ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d,
+ ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c64x.s,
+ ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
+ ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
+ ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
+ ld-tic6x/attr-arch-c674x.s, ld-tic6x/attr-arch-c67x+-c62x.d,
+ ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d,
+ ld-tic6x/attr-arch-c67x+-c674x.d,
+ ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
+ ld-tic6x/attr-arch-c67x+.s, ld-tic6x/attr-arch-c67x-c62x.d,
+ ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d,
+ ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d,
+ ld-tic6x/attr-arch-c67x-c67x.d, ld-tic6x/attr-arch-c67x.s: New.
+
2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* ld-arm/arm-call.d: Handle change in lsls/movs disassembly.
projects / deliverable / binutils-gdb.git / blobdiff