Align .TOC. for PowerPC64

[deliverable/binutils-gdb.git] / ld / testsuite / ld-powerpc / tlsexetoc.d

diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d
index 7ec07d2389e749c084661caaeec6918f76fba62b..1c70d54d9dcf0b131d8041d48784fe35bce2a5bd 100644 (file)
--- a/ld/testsuite/ld-powerpc/tlsexetoc.d
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.d
@@ -1,60 +1,73 @@
 #source: tlstoc.s
 #as: -a64
-#ld: -melf64ppc tmpdir/libtlslib.so
+#ld: tmpdir/libtlslib.so
 #objdump: -dr
 #target: powerpc64*-*-*
 
-.*: +file format elf64-powerpc
+.*
 
 Disassembly of section \.text:
 
-.* <_start-0x1c>:
-.*     3d 82 00 00     addis   r12,r2,0
-.*     f8 41 00 28     std     r2,40\(r1\)
-.*     e9 6c 80 70     ld      r11,-32656\(r12\)
-.*     e8 4c 80 78     ld      r2,-32648\(r12\)
-.*     7d 69 03 a6     mtctr   r11
-.*     e9 6c 80 80     ld      r11,-32640\(r12\)
-.*     4e 80 04 20     bctr
+.* <.*plt_call\.__tls_get_addr(|_opt)>:
+.*     (e9 63 00 00|00 00 63 e9)       ld      r11,0\(r3\)
+.*     (e9 83 00 08|08 00 83 e9)       ld      r12,8\(r3\)
+.*     (7c 60 1b 78|78 1b 60 7c)       mr      r0,r3
+.*     (2c 2b 00 00|00 00 2b 2c)       cmpdi   r11,0
+.*     (7c 6c 6a 14|14 6a 6c 7c)       add     r3,r12,r13
+.*     (4d 82 00 20|20 00 82 4d)       beqlr *
+.*     (7c 03 03 78|78 03 03 7c)       mr      r3,r0
+.*     (7d 68 02 a6|a6 02 68 7d)       mflr    r11
+.*     (f9 61 00 20|20 00 61 f9)       std     r11,32\(r1\)
+.*     (f8 41 00 28|28 00 41 f8)       std     r2,40\(r1\)
+.*     (e9 82 80 70|70 80 82 e9)       ld      r12,-32656\(r2\)
+.*     (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*     (e8 42 80 78|78 80 42 e8)       ld      r2,-32648\(r2\)
+.*     (4e 80 04 21|21 04 80 4e)       bctrl
+.*     (e8 41 00 28|28 00 41 e8)       ld      r2,40\(r1\)
+.*     (e9 61 00 20|20 00 61 e9)       ld      r11,32\(r1\)
+.*     (7d 68 03 a6|a6 03 68 7d)       mtlr    r11
+.*     (4e 80 00 20|20 00 80 4e)       blr
 
-.* <_start>:
-.*     38 62 80 08     addi    r3,r2,-32760
-.*     4b ff ff e1     bl      .*
-.*     e8 41 00 28     ld      r2,40\(r1\)
-.*     38 62 80 18     addi    r3,r2,-32744
-.*     4b ff ff d5     bl      .*
-.*     e8 41 00 28     ld      r2,40\(r1\)
-.*     3c 6d 00 00     addis   r3,r13,0
-.*     60 00 00 00     nop
-.*     38 63 90 38     addi    r3,r3,-28616
-.*     3c 6d 00 00     addis   r3,r13,0
-.*     60 00 00 00     nop
-.*     38 63 10 00     addi    r3,r3,4096
-.*     39 23 80 40     addi    r9,r3,-32704
-.*     3d 23 00 00     addis   r9,r3,0
-.*     81 49 80 48     lwz     r10,-32696\(r9\)
-.*     e9 22 80 48     ld      r9,-32696\(r2\)
-.*     7d 49 18 2a     ldx     r10,r9,r3
-.*     3d 2d 00 00     addis   r9,r13,0
-.*     a1 49 90 58     lhz     r10,-28584\(r9\)
-.*     89 4d 90 60     lbz     r10,-28576\(r13\)
-.*     3d 2d 00 00     addis   r9,r13,0
-.*     99 49 90 68     stb     r10,-28568\(r9\)
-.*     7d 89 02 a6     mfctr   r12
-.*     78 0b 1f 24     rldicr  r11,r0,3,60
-.*     34 40 80 00     addic\.  r2,r0,-32768
-.*     7d 8b 60 50     subf    r12,r11,r12
-.*     7c 42 fe 76     sradi   r2,r2,63
-.*     78 0b 17 64     rldicr  r11,r0,2,61
-.*     7c 42 58 38     and     r2,r2,r11
-.*     7d 8b 60 50     subf    r12,r11,r12
-.*     7d 8c 12 14     add     r12,r12,r2
-.*     3d 8c 00 01     addis   r12,r12,1
-.*     e9 6c 01 ec     ld      r11,492\(r12\)
-.*     39 8c 01 ec     addi    r12,r12,492
-.*     e8 4c 00 08     ld      r2,8\(r12\)
-.*     7d 69 03 a6     mtctr   r11
-.*     e9 6c 00 10     ld      r11,16\(r12\)
-.*     4e 80 04 20     bctr
-.*     38 00 00 00     li      r0,0
-.*     4b ff ff bc     b       .*
+.* <\._start>:
+.*     (38 62 80 08|08 80 62 38)       addi    r3,r2,-32760
+.*     (4b ff ff b5|b5 ff ff 4b)       bl      .*
+.*     (60 00 00 00|00 00 00 60)       nop
+.*     (38 62 80 18|18 80 62 38)       addi    r3,r2,-32744
+.*     (4b ff ff a9|a9 ff ff 4b)       bl      .*
+.*     (60 00 00 00|00 00 00 60)       nop
+.*     (3c 6d 00 00|00 00 6d 3c)       addis   r3,r13,0
+.*     (60 00 00 00|00 00 00 60)       nop
+.*     (38 63 90 38|38 90 63 38)       addi    r3,r3,-28616
+.*     (3c 6d 00 00|00 00 6d 3c)       addis   r3,r13,0
+.*     (60 00 00 00|00 00 00 60)       nop
+.*     (38 63 10 00|00 10 63 38)       addi    r3,r3,4096
+.*     (39 23 80 40|40 80 23 39)       addi    r9,r3,-32704
+.*     (3d 23 00 00|00 00 23 3d)       addis   r9,r3,0
+.*     (81 49 80 48|48 80 49 81)       lwz     r10,-32696\(r9\)
+.*     (e9 22 80 48|48 80 22 e9)       ld      r9,-32696\(r2\)
+.*     (7d 49 18 2a|2a 18 49 7d)       ldx     r10,r9,r3
+.*     (3d 2d 00 00|00 00 2d 3d)       addis   r9,r13,0
+.*     (a1 49 90 58|58 90 49 a1)       lhz     r10,-28584\(r9\)
+.*     (89 4d 90 60|60 90 4d 89)       lbz     r10,-28576\(r13\)
+.*     (3d 2d 00 00|00 00 2d 3d)       addis   r9,r13,0
+.*     (99 49 90 68|68 90 49 99)       stb     r10,-28568\(r9\)
+.*     (00 00 00 00|68 02 01 00) .*
+.*     (00 01 02 68|00 00 00 00) .*
+.* <__glink_PLTresolve>:
+.*     (7d 88 02 a6|a6 02 88 7d)       mflr    r12
+.*     (42 9f 00 05|05 00 9f 42)       bcl     20,4\*cr7\+so,.*
+.*     (7d 68 02 a6|a6 02 68 7d)       mflr    r11
+.*     (e8 4b ff f0|f0 ff 4b e8)       ld      r2,-16\(r11\)
+.*     (7d 88 03 a6|a6 03 88 7d)       mtlr    r12
+.*     (7d 62 5a 14|14 5a 62 7d)       add     r11,r2,r11
+.*     (e9 8b 00 00|00 00 8b e9)       ld      r12,0\(r11\)
+.*     (e8 4b 00 08|08 00 4b e8)       ld      r2,8\(r11\)
+.*     (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*     (e9 6b 00 10|10 00 6b e9)       ld      r11,16\(r11\)
+.*     (4e 80 04 20|20 04 80 4e)       bctr
+.*     (60 00 00 00|00 00 00 60)       nop
+.*     (60 00 00 00|00 00 00 60)       nop
+.*     (60 00 00 00|00 00 00 60)       nop
+.* <__tls_get_addr_opt@plt>:
+.*     (38 00 00 00|00 00 00 38)       li      r0,0
+.*     (4b ff ff c4|c4 ff ff 4b)       b       .*