+2000-11-07 Dave Brolley <brolley@redhat.com>
+
+ * cgen-dis.in (print_insn): All insns which can fit into insn_value
+ must be loaded there in their entirety.
+
+2000-10-20 Jakub Jelinek <jakub@redhat.com>
+
+ * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
+ (compute_arch_mask): Add v8plusb and v9b machines.
+ (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
+ * opcodes/sparc-opc.c: Support for Cheetah instruction set.
+ (prefetch_table): Add #invalidate.
+
+2000-10-16 Nick Clifton <nickc@redhat.com>
+
+ * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
+
+2000-10-06 Dave Brolley <brolley@redhat.com>
+
+ * fr30-desc.h: Regenerate.
+ * m32r-desc.h: Regenerate.
+ * m32r-ibld.c: Regenerate.
+
+2000-10-05 Jim Wilson <wilson@cygnus.com>
+
+ * ia64-ic.tbl: Update from Intel.
+ * ia64-asmtab.c: Regenerate.
+
+2000-10-04 Kazu Hirata <kazu@hxi.com>
+
+ * ia64-gen.c: Convert C++-style comments to C-style comments.
+ * tic54x-dis.c: Likewise.
+
+2000-09-29 Hans-Peter Nilsson <hp@axis.com>
+
+ Changes to add dollar prefix to registers for files where user symbols
+ don't have a leading underscore. Fix formatting.
+ * cris-dis.c (REGISTER_PREFIX_CHAR): New.
+ (format_reg): Add parameter with_reg_prefix. All callers changed.
+ (print_with_operands): Ditto.
+ (print_insn_cris_generic): Renamed from print_insn_cris, add
+ parameter with_reg_prefix.
+ (print_insn_cris_with_register_prefix,
+ print_insn_cris_without_register_prefix, cris_get_disassembler):
+ New.
+ * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
+
+2000-09-22 Jim Wilson <wilson@cygnus.com>
+
+ * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
+ gt, ge, ngt, and nge.
+ * ia64-asmtab.c: Regenerate.
+
+ * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
+ * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
+ (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
+ * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
+ * ia64-asmtab.c: Regnerate.
+
+2000-09-13 Anders Norlander <anorland@acc.umu.se>
+
+ * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
+ Add mfc0 and mtc0 with sub-selection values.
+ Add clo and clz opcodes.
+ Add msub and msubu instructions for MIPS32.
+ Add madd/maddu aliases for mad/madu for MIPS32.
+ Support wait, deret, eret, movn, pref for MIPS32.
+ Support tlbp, tlbr, tlbwi, tlbwr.
+ (P4): New define.
+
+ * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
+ (print_insn_arg): Handle 'H' args.
+ (set_mips_isa_type): Recognize 4K.
+ Use CPU_* defines instead of hardcoded numbers.
+
+2000-09-11 Catherine Moore <clm@redhat.com>
+
+ * d30v-opc.c (d30v_operand_t): New operand type Rb2.
+ (d30v_format_tab): Use Rb2 for modinc and moddec.
+
2000-09-07 Catherine Moore <clm@redhat.com>
* d30v-opc.c (d30v_format_tab): Use format Ra for