+2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com>
+
+ * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn
+ * microblaze-opcm.h (microblaze_instr): add clz
+
+2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com>
+
+ * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add lbur,
+ lhur, lwr, sbr, shr, swr
+ * microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
+ swr
+
+2012-11-09 Nick Clifton <nickc@redhat.com>
+
+ * configure.in: Add bfd_v850_rh850_arch.
+ * configure: Regenerate.
+ * disassemble.c (disassembler): Likewise.
+
+2012-11-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
+ * ia64-gen.c (fetch_insn_class): Likewise.
+
+2012-11-08 Alan Modra <amodra@gmail.com>
+
+ * po/POTFILES.in: Regenerate.
+
+2012-11-05 Alan Modra <amodra@gmail.com>
+
+ * configure.in: Apply 2012-09-10 change to config.in here.
+
+2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390-mkopc.c: Accept empty lines in s390-opc.txt.
+ * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2
+ and RRF_RMRR.
+ * s390-opc.txt: Add new instructions. New instruction type for lptea.
+
+2012-10-26 Christian Groessler <chris@groessler.org>
+
+ * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
+ trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
+ non-existing opcode trtrb.
+ * z8k-opc.h: Regenerate.
+
+2012-10-26 Alan Modra <amodra@gmail.com>
+
+ * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
+
+2012-10-24 Roland McGrath <mcgrathr@google.com>
+
+ * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
+ set rex_used to rex.
+
+2012-10-22 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
+
+2012-10-18 Tom Tromey <tromey@redhat.com>
+
+ * tic54x-dis.c (print_instruction): Don't use K&R style.
+ (print_parallel_instruction, sprint_dual_address)
+ (sprint_indirect_address, sprint_direct_address, sprint_mmr)
+ (sprint_cc2, sprint_condition): Likewise.
+
+2012-10-18 Kai Tietz <ktietz@redhat.com>
+
+ * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
+ value with a default.
+ (do_special_encoding): Likewise.
+ (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
+ variables with default.
+ * arc-dis.c (write_comments_): Don't use strncat due
+ size of state->commentBuffer pointer isn't predictable.
+
+2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
+ rmr_el3; remove daifset and daifclr.
+
+2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * aarch64-opc.c (operand_general_constraint_met_p): Change to check
+ the alignment of addr.offset.imm instead of that of shifter.amount for
+ operand type AARCH64_OPND_ADDR_UIMM12.
+
+2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * arm-dis.c: Use preferred form of vrint instruction variants
+ for disassembly.
+
+2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
+
+ * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
+ * i386-init.h: Regenerated.
+
+2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
+ * ppc-opc.c (VBA): New define.
+ (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
+ mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
+
+2012-10-04 Nick Clifton <nickc@redhat.com>
+
+ * v850-dis.c (disassemble): Place square parentheses around second
+ register operand of clr1, not1, set1 and tst1 instructions.
+
+2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390-mkopc.c: Support new option zEC12.
+ * s390-opc.c: Add new instruction formats.
+ * s390-opc.txt: Add new instructions for zEC12.
+
+2012-09-27 Anthony Green <green@moxielogic.com>
+
+ * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
+ * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
+
2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
- * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
- CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
+ * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
+ CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
and CPU_BTVER2_FLAGS.
* i386-init.h: Regenerated.
projects / deliverable / binutils-gdb.git / blobdiff