Replace a couple of assertions in the BFD library that can be triggered by attempts...

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 487e3df64202e100ae2a5c04e56b82d228e0e922..3e947367e21247330693ce9cd986d1a4e9dd12a8 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,72 @@
+2020-03-17  Sergey Belyashov  <sergey.belyashov@gmail.com>
+
+       PR 25641
+       * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
+
+2020-03-13  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (X86_64_0D): Rename to ...
+       (X86_64_0E): ... this.
+
+2020-03-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
+       * Makefile.in: Regenerated.
+
+2020-03-09  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
+       3-operand pseudos.
+       * i386-tbl.h: Re-generate.
+
+2020-03-09  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
+       vprot*, vpsha*, and vpshl*.
+       * i386-tbl.h: Re-generate.
+
+2020-03-09  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
+       vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
+       * i386-tbl.h: Re-generate.
+
+2020-03-09  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (set_bitfield): Ignore zero-length field names.
+       * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
+       cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
+       * i386-tbl.h: Re-generate.
+
+2020-03-09  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (struct template_arg, struct template_instance,
+       struct template_param, struct template, templates,
+       parse_template, expand_templates): New.
+       (process_i386_opcodes): Various local variables moved to
+       expand_templates. Call parse_template and expand_templates.
+       * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
+       * i386-tbl.h: Re-generate.
+
+2020-03-06  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
+       vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
+       register and memory source templates. Replace VexW= by VexW*
+       where applicable.
+       * i386-tbl.h: Re-generate.
+
+2020-03-06  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
+       VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
+       * i386-tbl.h: Re-generate.
+
+2020-03-06  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
+       * i386-tbl.h: Re-generate.
+
 2020-03-06  Jan Beulich  <jbeulich@suse.com>
 
        * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.