Add the operand encoding types for the new Armv8.2-a back-ported instructions. These...

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 410df9c6781817c9581f8c383e6d48097bb274cf..4056d88408166a91726a496a88c2bc9da8293f48 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,31 @@
+2017-11-09  Tamar Christina  <tamar.christina@arm.com>
+
+       * aarch64-tbl.h (QL_SHA512UPT, QL_V2SAME2D, QL_V3SAME2D): New.
+       (QL_V4SAME16B, QL_V4SAME4S, QL_XAR, QL_SM3TT, QL_V3FML2S): New.
+       (QL_V3FML4S, QL_V2FML2S, QL_V2FML4S, QL_RMIF, QL_SETF): New.
+       (QL_STLW, QL_STLX): New.
+
+2017-11-09  Tamar Christina  <tamar.christina@arm.com>
+
+       * aarch64-asm.h (ins_addr_offset): New.
+       * aarch64-asm.c (aarch64_ins_reglane): Add cryptosm3.
+       (aarch64_ins_addr_offset): New.
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis.h (ext_addr_offset): New.
+       * aarch64-dis.c (aarch64_ext_reglane): Add cryptosm3.
+       (aarch64_ext_addr_offset): New.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc.h (aarch64_field_kind): Add FLD_imm6_2,
+       FLD_imm4_2 and FLD_SM3_imm2.
+       * aarch64-opc.c (fields): Add FLD_imm6_2,
+       FLD_imm4_2 and FLD_SM3_imm2.
+       (operand_general_constraint_met_p): Add AARCH64_OPND_ADDR_OFFSET.
+       (aarch64_print_operand): Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2,
+       AARCH64_OPND_MASK, AARCH64_OPND_IMM_2 and AARCH64_OPND_ADDR_OFFSET.
+       * aarch64-opc-2.c (Va, MASK, IMM_2, ADDR_OFFSET, SM3_IMM2): New.
+       * aarch64-tbl.h
+       (aarch64_opcode_table): Add Va, MASK, IMM_2, ADDR_OFFSET, SM3_IMM2.
+
 2017-11-09 Tamar Christina  <tamar.christina@arm.com>
 
        * aarch64-tbl.h