+2005-04-14 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am (NO_WERROR): Define.
+ * configure.in: Invoke AM_BINUTILS_WARNINGS.
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+
+2005-04-04 Nick Clifton <nickc@redhat.com>
+
+ * fr30-asm.c: Regenerate.
+ * frv-asm.c: Regenerate.
+ * iq2000-asm.c: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * openrisc-asm.c: Regenerate.
+
+2005-04-01 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
+ visible operands in Intel mode. The first operand of monitor is
+ %rax in 64-bit mode.
+
+2005-04-01 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
+ easier future additions.
+
+2005-03-31 Jerome Guitton <guitton@gnat.com>
+
+ * configure.in: Check for basename.
+ * configure: Regenerate.
+ * config.in: Ditto.
+
+2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (SEG_Fixup): New.
+ (Sv): New.
+ (dis386): Use "Sv" for 0x8c and 0x8e.
+
+2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+ Nick Clifton <nickc@redhat.com>
+
+ * vax-dis.c: (entry_addr): New varible: An array of user supplied
+ function entry mask addresses.
+ (entry_addr_occupied_slots): New variable: The number of occupied
+ elements in entry_addr.
+ (entry_addr_total_slots): New variable: The total number of
+ elements in entry_addr.
+ (parse_disassembler_options): New function. Fills in the entry_addr
+ array.
+ (free_entry_array): New function. Release the memory used by the
+ entry addr array. Suppressed because there is no way to call it.
+ (is_function_entry): Check if a given address is a function's
+ start address by looking at supplied entry mask addresses and
+ symbol information, if available.
+ (print_insn_vax): Use parse_disassembler_options and is_function_entry.
+
+2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * cris-dis.c (print_with_operands): Use ~31L for long instead
+ of ~31.
+
+2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * mmix-opc.c (O): Revert the last change.
+ (Z): Likewise.
+
+2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
+ (Z): Likewise.
+
+2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * mmix-opc.c (O, Z): Force expression as unsigned long.
+
+2005-03-18 Nick Clifton <nickc@redhat.com>
+
+ * ip2k-asm.c: Regenerate.
+ * op/opcodes.pot: Regenerate.
+
+2005-03-16 Nick Clifton <nickc@redhat.com>
+ Ben Elliston <bje@au.ibm.com>
+
+ * configure.in (werror): New switch: Add -Werror to the
+ compiler command line. Enabled by default. Disable via
+ --disable-werror.
+ * configure: Regenerate.
+
+2005-03-16 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
+ BOOKE.
+
+2005-03-15 Alan Modra <amodra@bigpond.net.au>
+
+ * po/es.po: Commit new Spanish translation.
+
+ * po/fr.po: Commit new French translation.
+
+2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+
+ * vax-dis.c: Fix spelling error
+ (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
+ of just "Entry mask: < r1 ... >"
+
+2005-03-12 Zack Weinberg <zack@codesourcery.com>
+
+ * arm-dis.c (arm_opcodes): Document %E and %V.
+ Add entries for v6T2 ARM instructions:
+ bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
+ (print_insn_arm): Add support for %E and %V.
+ (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
+
+2005-03-10 Jeff Baker <jbaker@qnx.com>
+ Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
+ (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
+ (SPRG_MASK): Delete.
+ (XSPRG_MASK): Mask off extra bits now part of sprg field.
+ (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
+ mfsprg4..7 after msprg and consolidate.
+
+2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+
+ * vax-dis.c (entry_mask_bit): New array.
+ (print_insn_vax): Decode function entry mask.
+
+2005-03-07 Aldy Hernandez <aldyh@redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
+
+2005-03-05 Alan Modra <amodra@bigpond.net.au>
+
+ * po/opcodes.pot: Regenerate.
+
+2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
+
+ * arc-dis.c (a4_decoding_class): New enum.
+ (dsmOneArcInst): Use the enum values for the decoding class.
+ Remove redundant case in the switch for decodingClass value 11.
+
+2005-03-02 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
+ accesses.
+ (OP_C): Consider lock prefix in non-64-bit modes.
+
+2005-02-24 Alan Modra <amodra@bigpond.net.au>
+
+ * cris-dis.c (format_hex): Remove ineffective warning fix.
+ * crx-dis.c (make_instruction): Warning fix.
+ * frv-asm.c: Regenerate.
+
+2005-02-23 Nick Clifton <nickc@redhat.com>
+
+ * cgen-dis.in: Use bfd_byte for buffers that are passed to
+ read_memory.
+
+ * ia64-opc.c (locate_opcode_ent): Initialise opval array.
+
+ * crx-dis.c (make_instruction): Move argument structure into inner
+ scope and ensure that all of its fields are initialised before
+ they are used.
+
+ * fr30-asm.c: Regenerate.
+ * fr30-dis.c: Regenerate.
+ * frv-asm.c: Regenerate.
+ * frv-dis.c: Regenerate.
+ * ip2k-asm.c: Regenerate.
+ * ip2k-dis.c: Regenerate.
+ * iq2000-asm.c: Regenerate.
+ * iq2000-dis.c: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * m32r-dis.c: Regenerate.
+ * openrisc-asm.c: Regenerate.
+ * openrisc-dis.c: Regenerate.
+ * xstormy16-asm.c: Regenerate.
+ * xstormy16-dis.c: Regenerate.
+
+2005-02-22 Alan Modra <amodra@bigpond.net.au>
+
+ * arc-ext.c: Warning fixes.
+ * arc-ext.h: Likewise.
+ * cgen-opc.c: Likewise.
+ * ia64-gen.c: Likewise.
+ * maxq-dis.c: Likewise.
+ * ns32k-dis.c: Likewise.
+ * w65-dis.c: Likewise.
+ * ia64-asmtab.c: Regenerate.
+
+2005-02-22 Alan Modra <amodra@bigpond.net.au>
+
+ * fr30-desc.c: Regenerate.
+ * fr30-desc.h: Regenerate.
+ * fr30-opc.c: Regenerate.
+ * fr30-opc.h: Regenerate.
+ * frv-desc.c: Regenerate.
+ * frv-desc.h: Regenerate.
+ * frv-opc.c: Regenerate.
+ * frv-opc.h: Regenerate.
+ * ip2k-desc.c: Regenerate.
+ * ip2k-desc.h: Regenerate.
+ * ip2k-opc.c: Regenerate.
+ * ip2k-opc.h: Regenerate.
+ * iq2000-desc.c: Regenerate.
+ * iq2000-desc.h: Regenerate.
+ * iq2000-opc.c: Regenerate.
+ * iq2000-opc.h: Regenerate.
+ * m32r-desc.c: Regenerate.
+ * m32r-desc.h: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * m32r-opc.h: Regenerate.
+ * m32r-opinst.c: Regenerate.
+ * openrisc-desc.c: Regenerate.
+ * openrisc-desc.h: Regenerate.
+ * openrisc-opc.c: Regenerate.
+ * openrisc-opc.h: Regenerate.
+ * xstormy16-desc.c: Regenerate.
+ * xstormy16-desc.h: Regenerate.
+ * xstormy16-opc.c: Regenerate.
+ * xstormy16-opc.h: Regenerate.
+
+2005-02-21 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am"
+ * Makefile.in: Regenerate.
+
+2005-02-15 Nick Clifton <nickc@redhat.com>
+
+ * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
+ compile time warnings.
+ (print_keyword): Likewise.
+ (default_print_insn): Likewise.
+
+ * fr30-desc.c: Regenerated.
+ * fr30-desc.h: Regenerated.
+ * fr30-dis.c: Regenerated.
+ * fr30-opc.c: Regenerated.
+ * fr30-opc.h: Regenerated.
+ * frv-desc.c: Regenerated.
+ * frv-dis.c: Regenerated.
+ * frv-opc.c: Regenerated.
+ * ip2k-asm.c: Regenerated.
+ * ip2k-desc.c: Regenerated.
+ * ip2k-desc.h: Regenerated.
+ * ip2k-dis.c: Regenerated.
+ * ip2k-opc.c: Regenerated.
+ * ip2k-opc.h: Regenerated.
+ * iq2000-desc.c: Regenerated.
+ * iq2000-dis.c: Regenerated.
+ * iq2000-opc.c: Regenerated.
+ * m32r-asm.c: Regenerated.
+ * m32r-desc.c: Regenerated.
+ * m32r-desc.h: Regenerated.
+ * m32r-dis.c: Regenerated.
+ * m32r-opc.c: Regenerated.
+ * m32r-opc.h: Regenerated.
+ * m32r-opinst.c: Regenerated.
+ * openrisc-desc.c: Regenerated.
+ * openrisc-desc.h: Regenerated.
+ * openrisc-dis.c: Regenerated.
+ * openrisc-opc.c: Regenerated.
+ * openrisc-opc.h: Regenerated.
+ * xstormy16-desc.c: Regenerated.
+ * xstormy16-desc.h: Regenerated.
+ * xstormy16-dis.c: Regenerated.
+ * xstormy16-opc.c: Regenerated.
+ * xstormy16-opc.h: Regenerated.
+
+2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * dis-buf.c (perror_memory): Use sprintf_vma to print out
+ address.
+
+2005-02-11 Nick Clifton <nickc@redhat.com>
+
+ * iq2000-asm.c: Regenerate.
+
+ * frv-dis.c: Regenerate.
+
+2005-02-07 Jim Blandy <jimb@redhat.com>
+
+ * Makefile.am (CGEN): Load guile.scm before calling the main
+ application script.
+ * Makefile.in: Regenerated.
+ * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
+ Simply pass the cgen-opc.scm path to ${cgen} as its first
+ argument; ${cgen} itself now contains the '-s', or whatever is
+ appropriate for the Scheme being used.
+
+2005-01-31 Andrew Cagney <cagney@gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4.
+
+2005-01-31 Jan Beulich <jbeulich@novell.com>
+
+ * ia64-gen.c (NELEMS): Define.
+ (shrink): Generate alias with missing second predicate register when
+ opcode has two outputs and these are both predicates.
+ * ia64-opc-i.c (FULL17): Define.
+ (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
+ here to generate output template.
+ (TBITCM, TNATCM): Undefine after use.
+ * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
+ first input. Add ld16 aliases without ar.csd as second output. Add
+ st16 aliases without ar.csd as second input. Add cmpxchg aliases
+ without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
+ ar.ccv as third/fourth inputs. Consolidate through...
+ (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
+ CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
+ * ia64-asmtab.c: Regenerate.
+
+2005-01-27 Andrew Cagney <cagney@gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4 change.
+
+2005-01-25 Alexandre Oliva <aoliva@redhat.com>
+
+ 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
+ * frv-asm.c: Rebuilt.
+ * frv-desc.c: Rebuilt.
+ * frv-desc.h: Rebuilt.
+ * frv-dis.c: Rebuilt.
+ * frv-ibld.c: Rebuilt.
+ * frv-opc.c: Rebuilt.
+ * frv-opc.h: Rebuilt.
+
+2005-01-24 Andrew Cagney <cagney@gnu.org>
+
+ * configure: Regenerate, ../gettext.m4 was updated.
+
+2005-01-21 Fred Fish <fnf@specifixinc.com>
+
+ * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
+ Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
+ Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
+ * mips-dis.c: Ditto.
+
+2005-01-20 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
+
+2005-01-19 Fred Fish <fnf@specifixinc.com>
+
+ * mips-dis.c (no_aliases): New disassembly option flag.
+ (set_default_mips_dis_options): Init no_aliases to zero.
+ (parse_mips_dis_option): Handle no-aliases option.
+ (print_insn_mips): Ignore table entries that are aliases
+ if no_aliases is set.
+ (print_insn_mips16): Ditto.
+ * mips-opc.c (mips_builtin_opcodes): Add initializer column for
+ new pinfo2 member and add INSN_ALIAS initializers as needed. Also
+ move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
+ * mips16-opc.c (mips16_opcodes): Ditto.
+
+2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
+
+ * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
+ (inheritance diagram): Add missing edge.
+ (arch_sh1_up): Rename arch_sh_up to match external name to make life
+ easier for the testsuite.
+ (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
+ (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
+ (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
+ arch_sh2a_or_sh4_up child.
+ (sh_table): Do renaming as above.
+ Correct comment for ldc.l for gas testsuite to read.
+ Remove rogue mul.l from sh1 (duplicate of the one for sh2).
+ Correct comments for movy.w and movy.l for gas testsuite to read.
+ Correct comments for fmov.d and fmov.s for gas testsuite to read.
+
+2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
+
+2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
+
+2005-01-10 Andreas Schwab <schwab@suse.de>
+
+ * disassemble.c (disassemble_init_for_target) <case
+ bfd_arch_ia64>: Set skip_zeroes to 16.
+ <case bfd_arch_tic4x>: Set skip_zeroes to 32.
+
+2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
+
+2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
+
+ * avr-dis.c: Prettyprint. Added printing of symbol names in all
+ memory references. Convert avr_operand() to C90 formatting.
+
+2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
+
+2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
+ (no_op_insn): Initialize array with instructions that have no
+ operands.
+ * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
+
2004-11-29 Richard Earnshaw <rearnsha@arm.com>
* arm-dis.c: Correct top-level comment.
* maxq-dis.c: New file.
* disassemble.c (ARCH_maxq): Define.
- (disassembler): Add 'print_insn_maxq_little' for handling maxq
+ (disassembler): Add 'print_insn_maxq_little' for handling maxq
instructions..
* configure.in: Add case for bfd_maxq_arch.
* configure: Regenerate.
* crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
(getregliststring): Support HI/LO and user registers.
- * crx-opc.c (crx_instruction): Update data structure according to the
+ * crx-opc.c (crx_instruction): Update data structure according to the
rearrangement done in CRX opcode header file.
(crx_regtab): Likewise.
(crx_optab): Likewise.
- (crx_instruction): Reorder load/stor instructions, remove unsupported
+ (crx_instruction): Reorder load/stor instructions, remove unsupported
formats.
support new Co-Processor instruction 'cpi'.
2004-05-24 Peter Barada <peter@the-baradas.com>
* m68k-dis.c(print_insn_m68k): Strip body of diassembly out
- into new match_insn_m68k function. Loop over canidate
- matches and select first that completely matches.
+ into new match_insn_m68k function. Loop over canidate
+ matches and select first that completely matches.
* m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
* m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
- to verify addressing for MAC/EMAC.
+ to verify addressing for MAC/EMAC.
* m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
reigster halves since 'fpu' and 'spl' look misleading.
* m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
macro. Adjust all users.
2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
-
+
* h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
separately.
projects / deliverable / binutils-gdb.git / blobdiff