+2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
+ Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Sergey Lega <sergey.s.lega@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * i386-dis-evex.h: Updated.
+ * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
+ PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
+ PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
+ PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
+ PREFIX_EVEX_0F3A67.
+ (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
+ VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
+ (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
+ EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
+ EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
+ EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
+ EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
+ EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
+ EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
+ (prefix_table): Add entries for new instructions.
+ (vex_len_table): Ditto.
+ (vex_w_table): Ditto.
+ (OP_E_memory): Update xmmq_mode handling.
+ * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
+ (cpu_flags): Add CpuAVX512DQ.
+ * i386-init.h: Regenerared.
+ * i386-opc.h (CpuAVX512DQ): New.
+ (i386_cpu_flags): Add cpuavx512dq.
+ * i386-opc.tbl: Add AVX512DQ instructions.
+ * i386-tbl.h: Regenerate.
+
+2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
+ Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Sergey Lega <sergey.s.lega@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * i386-dis-evex.h: Add new instructions (prefixes bellow).
+ * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
+ (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
+ (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
+ PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
+ PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
+ PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
+ PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
+ PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
+ PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
+ PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
+ PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
+ PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
+ PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
+ PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
+ PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
+ PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
+ PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
+ PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
+ PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
+ PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
+ PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
+ PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
+ (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
+ VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
+ VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
+ VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
+ VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
+ VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
+ VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
+ VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
+ VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
+ VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
+ VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
+ (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
+ EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
+ EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
+ EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
+ EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
+ EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
+ EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
+ (prefix_table): Add entries for new instructions.
+ (vex_table) : Ditto.
+ (vex_len_table): Ditto.
+ (vex_w_table): Ditto.
+ (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
+ mask_bd_mode handling.
+ (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
+ handling.
+ (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
+ handling.
+ (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
+ (OP_EX): Add dqw_swap_mode handling.
+ (OP_VEX): Add mask_bd_mode handling.
+ (OP_Mask): Add mask_bd_mode handling.
+ * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
+ (cpu_flags): Add CpuAVX512BW.
+ * i386-init.h: Regenerated.
+ * i386-opc.h (CpuAVX512BW): New.
+ (i386_cpu_flags): Add cpuavx512bw.
+ * i386-opc.tbl: Add AVX512BW instructions.
+ * i386-tbl.h: Regenerate.
+
+2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
+ Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Sergey Lega <sergey.s.lega@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
+ * i386-tbl.h: Regenerate.
+
+2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
+ Alexander Ivchenko <alexander.ivchenko@intel.com>
+ Maxim Kuznetsov <maxim.kuznetsov@intel.com>
+ Sergey Lega <sergey.s.lega@intel.com>
+ Anna Tikhonova <anna.tikhonova@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+ Andrey Turetskiy <andrey.turetskiy@intel.com>
+ Ilya Verbin <ilya.verbin@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+ Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * i386-dis.c (intel_operand_size): Support 128/256 length in
+ vex_vsib_q_w_dq_mode.
+ (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
+ * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
+ (cpu_flags): Add CpuAVX512VL.
+ * i386-init.h: Regenerated.
+ * i386-opc.h (CpuAVX512VL): New.
+ (i386_cpu_flags): Add cpuavx512vl.
+ (BROADCAST_1TO4, BROADCAST_1TO2): Define.
+ * i386-opc.tbl: Add AVX512VL instructions.
+ * i386-tbl.h: Regenerate.
+
+2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
+
+ * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
+ * or1k-opinst.c: Regenerate.
+
+2014-07-08 Ilya Tocar <ilya.tocar@intel.com>
+
+ * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
+ (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
+
+2014-07-04 Alan Modra <amodra@gmail.com>
+
+ * configure.ac: Rename from configure.in.
+ * Makefile.in: Regenerate.
+ * config.in: Regenerate.
+
+2014-07-04 Alan Modra <amodra@gmail.com>
+
+ * configure.in: Include bfd/version.m4.
+ (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
+ (BFD_VERSION): Delete.
+ * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
+ * configure: Regenerate.
+ * Makefile.in: Regenerate.
+
+2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
+ Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+ Pitchumani Sivanupandi <pitchumani.s@atmel.com>
+ Soundararajan <Sounderarajan.D@atmel.com>
+
+ * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
+ (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
+ machine is not avrtiny.
+
+2014-06-26 Philippe De Muyter <phdm@macqel.be>
+
+ * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
+ constants.
+
+2014-06-12 Alan Modra <amodra@gmail.com>
+
+ * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
+ * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
+
+2014-06-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (fwait_prefix): New.
+ (ckprefix): Set fwait_prefix.
+ (print_insn): Properly print prefixes before fwait.
+
+2014-06-07 Alan Modra <amodra@gmail.com>
+
+ * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
+
+2014-06-05 Joel Brobecker <brobecker@adacore.com>
+
+ * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
+ bfd's development.sh.
+ * Makefile.in, configure: Regenerate.
+
+2014-06-03 Nick Clifton <nickc@redhat.com>
+
+ * msp430-dis.c (msp430_doubleoperand): Use extension_word to
+ decide when extended addressing is being used.
+
+2014-06-02 Eric Botcazou <ebotcazou@adacore.com>
+
+ * sparc-opc.c (cas): Disable for LEON.
+ (casl): Likewise.
+
+2014-05-20 Alan Modra <amodra@gmail.com>
+
+ * m68k-dis.c: Don't include setjmp.h.
+
+2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (ADDR16_PREFIX): Removed.
+ (ADDR32_PREFIX): Likewise.
+ (DATA16_PREFIX): Likewise.
+ (DATA32_PREFIX): Likewise.
+ (prefix_name): Updated.
+ (print_insn): Simplify data and address size prefixes processing.
+
+2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
+
+ * or1k-desc.c: Regenerated.
+ * or1k-desc.h: Likewise.
+ * or1k-opc.c: Likewise.
+ * or1k-opc.h: Likewise.
+ * or1k-opinst.c: Likewise.
+
+2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
+ (I34): New define.
+ (I36): New define.
+ (I66): New define.
+ (I68): New define.
+ * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
+ mips64r5.
+ (parse_mips_dis_option): Update MSA and virtualization support to
+ allow mips64r3 and mips64r5.
+
+2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * mips-opc.c (G3): Remove I4.
+
+2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/16893
+ * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
+ (end_codep): Likewise.
+ (mandatory_prefix): Likewise.
+ (active_seg_prefix): Likewise.
+ (ckprefix): Set active_seg_prefix to the active segment register
+ prefix.
+ (seg_prefix): Removed.
+ (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
+ for prefix index. Ignore the index if it is invalid and the
+ mandatory prefix isn't required.
+ (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
+ mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
+ in used_prefixes here. Don't print unused prefixes. Check
+ active_seg_prefix for the active segment register prefix.
+ Restore the DFLAG bit in sizeflag if the data size prefix is
+ unused. Check the unused mandatory PREFIX_XXX prefixes
+ (append_seg): Only print the segment register which gets used.
+ (OP_E_memory): Check active_seg_prefix for the segment register
+ prefix.
+ (OP_OFF): Likewise.
+ (OP_OFF64): Likewise.
+ (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
+
+2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/16886
+ * config.in: Regenerated.
+ * configure: Likewise.
+ * configure.in: Check if sigsetjmp is available.
+ * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
+ (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
+ (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
+ * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
+ (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
+ (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
+ * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
+ (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
+ (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
+ * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
+ (OPCODES_SIGSETJMP): Likewise.
+ (OPCODES_SIGLONGJMP): Likewise.
+ * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
+ (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
+ (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
+ * xtensa-dis.c (dis_private): Replace jmp_buf with
+ OPCODES_SIGJMP_BUF.
+ (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
+ (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
+ * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
+ (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
+ (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
+
+2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/16891
+ * i386-dis.c (print_insn): Handle prefixes before fwait.
+
2014-04-26 Alan Modra <amodra@gmail.com>
* po/POTFILES.in: Regenerate.
projects / deliverable / binutils-gdb.git / blobdiff