+2020-01-18 Nick Clifton <nickc@redhat.com>
+
+ Binutils 2.34 branch created.
+
+2020-01-17 Christian Biesinger <cbiesinger@google.com>
+
+ * opintl.h: Fix spelling error (seperate).
+
+2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.tbl: Add {vex} pseudo prefix.
+ * i386-tbl.h: Regenerated.
+
+2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR 25376
+ * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
+ (neon_opcodes): Likewise.
+ (select_arm_features): Make sure we enable MVE bits when selecting
+ armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
+ any architecture.
+
+2020-01-16 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl: Drop stale comment from XOP section.
+
+2020-01-16 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
+ (extractps): Add VexWIG to SSE2AVX forms.
+ * i386-tbl.h: Re-generate.
+
+2020-01-16 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
+ Size64 from and use VexW1 on SSE2AVX forms.
+ (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
+ VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
+ * i386-tbl.h: Re-generate.
+
+2020-01-15 Alan Modra <amodra@gmail.com>
+
+ * tic4x-dis.c (tic4x_version): Make unsigned long.
+ (optab, optab_special, registernames): New file scope vars.
+ (tic4x_print_register): Set up registernames rather than
+ malloc'd registertable.
+ (tic4x_disassemble): Delete optable and optable_special. Use
+ optab and optab_special instead. Throw away old optab,
+ optab_special and registernames when info->mach changes.
+
+2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25377
+ * z80-dis.c (suffix): Use .db instruction to generate double
+ prefix.
+
+2020-01-14 Alan Modra <amodra@gmail.com>
+
+ * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
+ values to unsigned before shifting.
+
+2020-01-13 Thomas Troeger <tstroege@gmx.de>
+
+ * arm-dis.c (print_insn_arm): Fill in insn info fields for control
+ flow instructions.
+ (print_insn_thumb16, print_insn_thumb32): Likewise.
+ (print_insn): Initialize the insn info.
+ * i386-dis.c (print_insn): Initialize the insn info fields, and
+ detect jumps.
+
+2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
+
+ * arc-opc.c (C_NE): Make it required.
+
+2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
+
+ * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
+ reserved register name.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
+ (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
+ result of wasm_read_leb128 in a uint64_t and check that bits
+ are not lost when copying to other locals. Use uint32_t for
+ most locals. Use PRId64 when printing int64_t.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * score-dis.c: Formatting.
+ * score7-dis.c: Formatting.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * score-dis.c (print_insn_score48): Use unsigned variables for
+ unsigned values. Don't left shift negative values.
+ (print_insn_score32): Likewise.
+ * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * tic4x-dis.c (tic4x_print_register): Remove dead code.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * fr30-ibld.c: Regenerate.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * xgate-dis.c (print_insn): Don't left shift signed value.
+ (ripBits): Formatting, use 1u.
+
+2020-01-10 Alan Modra <amodra@gmail.com>
+
+ * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
+ * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
+
+2020-01-10 Alan Modra <amodra@gmail.com>
+
+ * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
+ and XRREG value earlier to avoid a shift with negative exponent.
+ * m10200-dis.c (disassemble): Similarly.
+
+2020-01-09 Nick Clifton <nickc@redhat.com>
+
+ PR 25224
+ * z80-dis.c (ld_ii_ii): Use correct cast.
+
+2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25224
+ * z80-dis.c (ld_ii_ii): Use character constant when checking
+ opcode byte value.
+
+2020-01-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (SEP_Fixup): New.
+ (SEP): Define.
+ (dis386_twobyte): Use it for sysenter/sysexit.
+ (enum x86_64_isa): Change amd64 enumerator to value 1.
+ (OP_J): Compare isa64 against intel64 instead of amd64.
+ * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
+ forms.
+ * i386-tbl.h: Re-generate.
+
+2020-01-08 Alan Modra <amodra@gmail.com>
+
+ * z8k-dis.c: Include libiberty.h
+ (instr_data_s): Make max_fetched unsigned.
+ (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
+ Don't exceed byte_info bounds.
+ (output_instr): Make num_bytes unsigned.
+ (unpack_instr): Likewise for nibl_count and loop.
+ * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
+ idx unsigned.
+ * z8k-opc.h: Regenerate.
+
+2020-01-07 Shahab Vahedi <shahab@synopsys.com>
+
+ * arc-tbl.h (llock): Use 'LLOCK' as class.
+ (llockd): Likewise.
+ (scond): Use 'SCOND' as class.
+ (scondd): Likewise.
+ (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
+ (scondd): Likewise.
+
+2020-01-06 Alan Modra <amodra@gmail.com>
+
+ * m32c-ibld.c: Regenerate.
+
+2020-01-06 Alan Modra <amodra@gmail.com>
+
+ PR 25344
+ * z80-dis.c (suffix): Don't use a local struct buffer copy.
+ Peek at next byte to prevent recursion on repeated prefix bytes.
+ Ensure uninitialised "mybuf" is not accessed.
+ (print_insn_z80): Don't zero n_fetch and n_used here,..
+ (print_insn_z80_buf): ..do it here instead.
+
+2020-01-04 Alan Modra <amodra@gmail.com>
+
+ * m32r-ibld.c: Regenerate.
+
+2020-01-04 Alan Modra <amodra@gmail.com>
+
+ * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
+
+2020-01-04 Alan Modra <amodra@gmail.com>
+
+ * crx-dis.c (match_opcode): Avoid shift left of signed value.
+
+2020-01-04 Alan Modra <amodra@gmail.com>
+
+ * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
+
+2020-01-03 Jan Beulich <jbeulich@suse.com>
+
+ * aarch64-tbl.h (aarch64_opcode_table): Use
+ SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
+
+2020-01-03 Jan Beulich <jbeulich@suse.com>
+
+ * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
+ forms of SUDOT and USDOT.
+
+2020-01-03 Jan Beulich <jbeulich@suse.com>
+
+ * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
+ uzip{1,2}.
+ * opcodes/aarch64-dis-2.c: Re-generate.
+
+2020-01-03 Jan Beulich <jbeulich@suse.com>
+
+ * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
+ FMMLA encoding.
+ * opcodes/aarch64-dis-2.c: Re-generate.
+
+2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ * z80-dis.c: Add support for eZ80 and Z80 instructions.
+
2020-01-01 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
projects / deliverable / binutils-gdb.git / blobdiff