x86: convert SReg from bitfield to enumerator

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 21372d4b5c972fd501712631c661a5df28f3b356..6c4c3ff09c8905823438a3cdb1775bce1914fc34 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,45 @@
+2019-11-08  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (operand_type_init): Add Class= to
+       OPERAND_TYPE_SREG entry.
+       (operand_classes): Add SReg entry.
+       (operand_types): Drop SReg entry.
+       * i386-opc.h (enum operand_class): Add SReg.
+       (SReg): Delete.
+       (union i386_operand_type): Remove sreg field.
+       * i386-opc.tbl (SReg): Define.
+       * i386-reg.tbl: Replace SReg by Class=SReg.
+       * i386-init.h, i386-tbl.h: Re-generate.
+
+2019-11-08  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (operand_type_init): Add Class=. New
+       OPERAND_TYPE_ANYIMM entry.
+       (operand_classes): New.
+       (operand_types): Drop Reg entry.
+       (output_operand_type): New parameter "class". Process it.
+       (process_i386_operand_type): New local variable "class".
+       (main): Adjust static assertions.
+       * i386-opc.h (CLASS_WIDTH): Define.
+       (enum operand_class): New.
+       (Reg): Replace by Class. Adjust comment.
+       (union i386_operand_type): Replace reg by class.
+       * i386-opc.tbl (Reg8, Reg16, Reg32, Reg64, FloatReg): Add
+       Class=.
+       * i386-reg.tbl: Replace Reg by Class=Reg.
+       * i386-init.h: Re-generate.
+
+2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
+
+       * opcodes/aarch64-tbl.h (V8_6_INSN): New macro for v8.6 instructions.
+       (aarch64_opcode_table): Add data gathering hint mnemonic.
+       * opcodes/aarch64-dis-2.c: Account for new instruction.
+
+2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
+
+       * arm-dis.c (neon_opcodes): Add i8mm SIMD instructions.
+
+
 2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
 
        * aarch64-tbl.h (aarch64_feature_i8mm_sve, aarch64_feature_f32mm_sve,