+2000-05-10 Geoff Keating <geoffk@cygnus.com>
+
+ * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
+ also available in common mode when powerpc syntax is being used.
+
+2000-05-08 Alan Modra <alan@linuxcare.com.au>
+
+ * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
+ (dummy_print_address): Ditto.
+
+2000-05-04 Timothy Wall <twall@cygnus.com>
+
+ * tic54x-opc.c: New.
+ * tic54x-dis.c: New.
+ * disassemble.c (disassembler): Add ARCH_tic54x.
+ * configure.in: Added tic54x target.
+ * configure: Ditto.
+ * Makefile.am: Add tic54x dependencies.
+ * Makefile.in: Ditto.
+
+2000-05-03 J.T. Conklin <jtc@redback.com>
+
+ * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
+ vector unit operands.
+ (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
+ unit instruction formats.
+ (PPCVEC): New macro, mask for vector instructions.
+ (powerpc_operands): Add table entries for above operand types.
+ (powerpc_opcodes): Add table entries for vector instructions.
+
+ * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
+ (print_insn_little_powerpc): Likewise.
+ (print_insn_powerpc): Prepend 'v' when printing vector registers.
+
+Sun Apr 23 17:54:14 2000 Denis Chertykov <denisc@overta.ru>
+
+ * avr-dis.c (reg_fmul_d): New. Extract destination register from
+ FMUL instruction.
+ (reg_fmul_r): New. Extract source register from FMUL instruction.
+ (reg_muls_d): New. Extract destination register from MULS instruction.
+ (reg_muls_r): New. Extract source register from MULS instruction.
+ (reg_movw_d): New. Extract destination register from MOVW instruction.
+ (reg_movw_r): New. Extract source register from MOVW instruction.
+ (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
+ EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
+
+Mon Apr 24 15:21:35 2000 Clinton Popetz <cpopetz@cygnus.com>
+
+ * configure.in: Add bfd_powerpc_64_arch.
+ * disassemble.c (disassembler): Use print_insn_big_powerpc for
+ 64 bit code.
+
+2000-04-24 Nick Clifton <nickc@cygnus.com>
+
+ * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
+ field.
+
+2000-04-22 Timothy Wall <twall@cygnus.com>
+
+ * ia64-gen.c (general): Add an ordered table of primary
+ opcode names, as well as priority fields to disassembly data
+ structures to enforce a preferred disassembly format based on the
+ ordering of the opcode tables.
+ (load_insn_classes): Show a useful message if IC tables are missing.
+ (load_depfile): Ditto.
+ * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
+ distinguish preferred disassembly.
+ * ia64-opc-f.c: Reorder some insn for preferred disassembly
+ format. Fix incorrect flag on fma.s/fma.s.s0.
+ * ia64-opc.c: Scan *all* disassembly matches and use the one with
+ the highest priority.
+ * ia64-opc-b.c: Use more abbreviations.
+ * ia64-asmtab.c: Regenerate.
+
+Fri Apr 21 16:03:39 2000 Jason Eckhardt <jle@cygnus.com>
+
+ * hppa-dis.c (extract_16): New function.
+ (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
+ new operand types l,y,&,fe,fE,fx.
+
+Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
+ David Mosberger <davidm@hpl.hp.com>
+ Timothy Wall <twall@cygnus.com>
+ Bob Manson <manson@charmed.cygnus.com>
+ Jim Wilson <wilson@cygnus.com>
+
+ * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
+ (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
+ ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
+ ia64-asmtab.c.
+ (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
+ (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
+ ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
+ * Makefile.in: Rebuild.
+ * configure Rebuild.
+ * configure.in (bfd_ia64_arch): New target.
+ * disassemble.c (ARCH_ia64): Define.
+ (disassembler): Support ARCH_ia64.
+ * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
+ ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
+ ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
+ ia64-war.tbl, ia64-waw.tbl): New files.
+
+2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
+
+ * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
+ (disassemble): Use them.
+
+2000-04-14 Alan Modra <alan@linuxcare.com.au>
+
+ * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
+ * Makefile.am: Update dependencies.
+ * Makefile.in: Regenerate.
+
+2000-04-14 Michael Sokolov <msokolov@ivan.Harhan.ORG>
+
+ * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
+ avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
+ disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
+ i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
+ m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
+ mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
+ ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
+ tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
+ w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
+ ansidecl.h as sysdep.h includes it.
+
+Fri Apr 7 15:56:57 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
+ --enable-build-warnings option.
+ * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
+ * Makefile.in, configure: Re-generate.
+
+Wed Apr 5 22:28:18 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
+ stc GBR,@-<REG_N> is available for arch_sh1_up.
+ Group parallel processing insn with identical mnemonics together.
+ Make three-operand psha / pshl come first.
+
+Wed Apr 5 22:05:40 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
+ Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
+ (sh_arg_type): Add A_PC.
+ (sh_table): Update entries using immediates. Add repeat.
+ * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
+ Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
+
+2000-04-04 Alan Modra <alan@linuxcare.com.au>
+
+ * po/opcodes.pot: Regenerate.
+
+ * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
+ (DEP): Quote when passing vars to sub-make. Add warning message
+ to end.
+ (DEP1): Rewrite for "gcc -MM".
+ (CLEANFILES): Add DEP2.
+ Update dependencies.
+ * Makefile.in: Regenerate.
+
+2000-04-03 Denis Chertykov <denisc@overta.ru>
+
+ * avr-dis.c: Syntax cleanup.
+ (add0fff): Print the pc relative address as a signed number.
+ (add03f8): Likewise.
+
+2000-04-01 Ian Lance Taylor <ian@zembu.com>
+
+ * disassemble.c (disassembler_usage): Don't use a prototype. Mark
+ the parameter ATTRIBUTE_UNUSED.
+ * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
+
+2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
+
+ * m10300-opc.c: SP-based offsets are always unsigned.
+
+2000-03-29 Thomas de Lellis <tdel@windriver.com>
+
+ * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
+ [branch always] instead of "undefined".
+
+2000-03-27 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
+ short instructions, from end of list of long instructions.
+
+2000-03-27 Ian Lance Taylor <ian@zembu.com>
+
+ * Makefile.am (CFILES): Add avr-dis.c.
+ (ALL_MACHINES): Add avr-dis.lo.
+
+2000-03-27 Alan Modra <alan@linuxcare.com>
+
+ * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
+ truncate integers.
+ (print_insn_avr): Call function via pointer in K&R compatible way.
+ (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
+ add0fff, add03f8): Convert to old style function declaration and
+ add prototype.
+ (avrdis_opcode): Add prototype.
+
+2000-03-27 Denis Chertykov <denisc@overta.ru>
+
+ * avr-dis.c: New file. AVR disassembler.
+ * configure.in (bfd_avr_arch): New architecture support.
+ * disassemble.c: Likewise.
+ * configure: Regenerate.
+
+Mon Mar 6 19:52:05 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
+
+2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
+ flag to determine if operand is pc-relative.
+ * d30v-opc.c:
+ (d30v_format_table):
+ (REL6S3): Renamed from IMM6S3.
+ Added flag OPERAND_PCREL.
+ (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
+ added flag OPERAND_PCREL.
+ (IMM12S3U): Replaced with REL12S3.
+ (SHORT_D2, LONG_D): Delay target is pc-relative.
+ (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
+ Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
+ using the REL* operands.
+ (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
+ (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
+ LONG_Db, using REL* operands.
+ (SHORT_U, SHORT_A5S): Removed stray alternatives.
+ (d30v_opcode_table): Use new *r formats.
+
2000-02-28 Nick Clifton <nickc@cygnus.com>
* m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
projects / deliverable / binutils-gdb.git / blobdiff