+2020-04-30 Alex Coplan <alex.coplan@arm.com>
+
+ * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
+ * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
+ (operand_general_constraint_met_p): validate
+ AARCH64_OPND_UNDEFINED.
+ * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
+ for FLD_imm16_2.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
+2020-04-29 Nick Clifton <nickc@redhat.com>
+
+ PR 22699
+ * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
+ and SETRC insns.
+
+2020-04-29 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2020-04-29 Nick Clifton <nickc@redhat.com>
+
+ PR 22699
+ * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
+ IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
+ * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
+ IMM0_8U case.
+
+2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
+
+ PR 25848
+ * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
+ cmpi only on m68020up and cpu32.
+
+2020-04-20 Sudakshina Das <sudi.das@arm.com>
+
+ * aarch64-asm.c (aarch64_ins_none): New.
+ * aarch64-asm.h (ins_none): New declaration.
+ * aarch64-dis.c (aarch64_ext_none): New.
+ * aarch64-dis.h (ext_none): New declaration.
+ * aarch64-opc.c (aarch64_print_operand): Update case for
+ AARCH64_OPND_BARRIER_PSB.
+ * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
+ (AARCH64_OPERANDS): Update inserter/extracter for
+ AARCH64_OPND_BARRIER_PSB to use new dummy functions.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
+2020-04-20 Sudakshina Das <sudi.das@arm.com>
+
+ * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
+ (aarch64_feature_ras, RAS): Likewise.
+ (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
+ (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
+ autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
+ autiaz, autiasp, autibz, autibsp to be CORE_INSN.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
+2020-04-17 Fredrik Strupe <fredrik@strupe.net>
+
+ * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
+ (print_insn_neon): Support disassembly of conditional
+ instructions.
+
+2020-02-16 David Faust <david.faust@oracle.com>
+
+ * bpf-desc.c: Regenerate.
+ * bpf-desc.h: Likewise.
+ * bpf-opc.c: Regenerate.
+ * bpf-opc.h: Likewise.
+
+2020-04-07 Lili Cui <lili.cui@intel.com>
+
+ * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
+ (prefix_table): New instructions (see prefixes above).
+ (rm_table): Likewise
+ * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
+ CPU_ANY_TSXLDTRK_FLAGS.
+ (cpu_flags): Add CpuTSXLDTRK.
+ * i386-opc.h (enum): Add CpuTSXLDTRK.
+ (i386_cpu_flags): Add cputsxldtrk.
+ * i386-opc.tbl: Add XSUSPLDTRK insns.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Likewise.
+
+2020-04-02 Lili Cui <lili.cui@intel.com>
+
+ * i386-dis.c (prefix_table): New instructions serialize.
+ * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
+ CPU_ANY_SERIALIZE_FLAGS.
+ (cpu_flags): Add CpuSERIALIZE.
+ * i386-opc.h (enum): Add CpuSERIALIZE.
+ (i386_cpu_flags): Add cpuserialize.
+ * i386-opc.tbl: Add SERIALIZE insns.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Likewise.
+
+2020-03-26 Alan Modra <amodra@gmail.com>
+
+ * disassemble.h (opcodes_assert): Declare.
+ (OPCODES_ASSERT): Define.
+ * disassemble.c: Don't include assert.h. Include opintl.h.
+ (opcodes_assert): New function.
+ * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
+ (bfd_h8_disassemble): Reduce size of data array. Correctly
+ calculate maxlen. Omit insn decoding when insn length exceeds
+ maxlen. Exit from nibble loop when looking for E, before
+ accessing next data byte. Move processing of E outside loop.
+ Replace tests of maxlen in loop with assertions.
+
+2020-03-26 Alan Modra <amodra@gmail.com>
+
+ * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
+
+2020-03-25 Alan Modra <amodra@gmail.com>
+
+ * z80-dis.c (suffix): Init mybuf.
+
+2020-03-22 Alan Modra <amodra@gmail.com>
+
+ * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
+ successflly read from section.
+
+2020-03-22 Alan Modra <amodra@gmail.com>
+
+ * arc-dis.c (find_format): Use ISO C string concatenation rather
+ than line continuation within a string. Don't access needs_limm
+ before testing opcode != NULL.
+
+2020-03-22 Alan Modra <amodra@gmail.com>
+
+ * ns32k-dis.c (print_insn_arg): Update comment.
+ (print_insn_ns32k): Reduce size of index_offset array, and
+ initialize, passing -1 to print_insn_arg for args that are not
+ an index. Don't exit arg loop early. Abort on bad arg number.
+
+2020-03-22 Alan Modra <amodra@gmail.com>
+
+ * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
+ * s12z-opc.c: Formatting.
+ (operands_f): Return an int.
+ (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
+ (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
+ (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
+ (exg_sex_discrim): Likewise.
+ (create_immediate_operand, create_bitfield_operand),
+ (create_register_operand_with_size, create_register_all_operand),
+ (create_register_all16_operand, create_simple_memory_operand),
+ (create_memory_operand, create_memory_auto_operand): Don't
+ segfault on malloc failure.
+ (z_ext24_decode): Return an int status, negative on fail, zero
+ on success.
+ (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
+ (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
+ (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
+ (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
+ (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
+ (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
+ (loop_primitive_decode, shift_decode, psh_pul_decode),
+ (bit_field_decode): Similarly.
+ (z_decode_signed_value, decode_signed_value): Similarly. Add arg
+ to return value, update callers.
+ (x_opr_decode_with_size): Check all reads, returning NULL on fail.
+ Don't segfault on NULL operand.
+ (decode_operation): Return OP_INVALID on first fail.
+ (decode_s12z): Check all reads, returning -1 on fail.
+
+2020-03-20 Alan Modra <amodra@gmail.com>
+
+ * metag-dis.c (print_insn_metag): Don't ignore status from
+ read_memory_func.
+
+2020-03-20 Alan Modra <amodra@gmail.com>
+
+ * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
+ Initialize parts of buffer not written when handling a possible
+ 2-byte insn at end of section. Don't attempt decoding of such
+ an insn by the 4-byte machinery.
+
+2020-03-20 Alan Modra <amodra@gmail.com>
+
+ * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
+ partially filled buffer. Prevent lookup of 4-byte insns when
+ only VLE 2-byte insns are possible due to section size. Print
+ ".word" rather than ".long" for 2-byte leftovers.
+
+2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25641
+ * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
+
+2020-03-13 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (X86_64_0D): Rename to ...
+ (X86_64_0E): ... this.
+
+2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
+ * Makefile.in: Regenerated.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
+ 3-operand pseudos.
+ * i386-tbl.h: Re-generate.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
+ vprot*, vpsha*, and vpshl*.
+ * i386-tbl.h: Re-generate.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
+ vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
+ * i386-tbl.h: Re-generate.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (set_bitfield): Ignore zero-length field names.
+ * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
+ cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
+ * i386-tbl.h: Re-generate.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (struct template_arg, struct template_instance,
+ struct template_param, struct template, templates,
+ parse_template, expand_templates): New.
+ (process_i386_opcodes): Various local variables moved to
+ expand_templates. Call parse_template and expand_templates.
+ * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
+ * i386-tbl.h: Re-generate.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
+ vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
+ register and memory source templates. Replace VexW= by VexW*
+ where applicable.
+ * i386-tbl.h: Re-generate.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
+ VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
+ * i386-tbl.h: Re-generate.
+
2020-03-06 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.