x86: drop a few dead macros

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f7890e03c1c832978f3795bc9db8992ee870faa0..965f7a7bcb520ccadf990c65bd437e48f7e16dfa 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,67 @@
+2019-07-01  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (EXdVex, EXdVexS, EXqVex, EXqVexS, XMVex):
+       Delete.
+
+2019-06-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/24719
+       * i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
+       EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
+       EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
+       EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
+       EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
+       EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
+       EVEX_LEN_0F38C7_R_6_P_2_W_1.
+       * i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
+       PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
+       PREFIX_EVEX_0F38C6_REG_6 entries.
+       * i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
+       EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
+       EVEX_W_0F38C7_R_6_P_2 entries.
+       * i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
+       EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
+       EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
+       EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
+       EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
+       EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
+       EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
+
+2019-06-27  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (VEX_LEN_0F2A_P_1, VEX_LEN_0F2A_P_3,
+       VEX_LEN_0F2C_P_1, VEX_LEN_0F2C_P_3, VEX_LEN_0F2D_P_1,
+       VEX_LEN_0F2D_P_3): Delete.
+       (vex_len_table): Move vcvtsi2ss, vcvtsi2sd, vcvttss2si,
+       vcvttsd2si, vcvtss2si, and vcvtsd2si leaf entries ...
+       (prefix_table): ... here.
+
+2019-06-27  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (Iq): Delete.
+       (Id): New.
+       (reg_table): Use it for lwpins, lwpval, and bextr. Use Edq for
+       TBM insns.
+       (vex_len_table): Use Edq for vcvtsi2ss, vcvtsi2sd. Use Gdq for
+       vcvttss2si, vcvttsd2si, vcvtss2si, and vcvtsd2si.
+       (OP_E_memory): Also honor needindex when deciding whether an
+       address size prefix needs printing.
+       (OP_I): Remove handling of q_mode. Add handling of d_mode.
+
+2019-06-26  Jim Wilson  <jimw@sifive.com>
+
+       PR binutils/24739
+       * riscv-dis.c (riscv_disasemble_insn): Set info->endian_code.
+       Set info->display_endian to info->endian_code.
+
+2019-06-25  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (operand_type_init): Correct OPERAND_TYPE_DEBUG
+       entry. Drop OPERAND_TYPE_ACC entry. Add OPERAND_TYPE_ACC8 and
+       OPERAND_TYPE_ACC16 entries. Adjust OPERAND_TYPE_ACC32 and
+       OPERAND_TYPE_ACC64 entries.
+       * i386-init.h: Re-generate.
+
 2019-06-25  Jan Beulich  <jbeulich@suse.com>
 
        * i386-dis.c (Edqa, dqa_mode, EVEX_W_0F2A_P_1, EVEX_W_0F7B_P_1):
@@ -19,7 +83,7 @@
        * i386-dis.c (prefix_table): Use Edq for cvtsi2ss and cvtsi2sd.
        Use Gdq for cvttss2si, cvttsd2si, cvtss2si, and cvtsd2si, and
        movnti.
-       * i386-opc.tbl (movnti): Add IgnoreSize. 
+       * i386-opc.tbl (movnti): Add IgnoreSize.
        * i386-tbl.h: Re-generate.
 
 2019-06-25  Jan Beulich  <jbeulich@suse.com>