x86: Don't disable SSE3 when disabling SSE4a

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6b0c17f8ae1f9c20df4ec0791f2840bca9ae4230..9d02fc45e7c505e955af3b9aeb9e1e1400af17b9 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,30 @@
+2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
+       CPU_ANY_SSE4A_FLAGS.
+
+2020-02-17  Alan Modra  <amodra@gmail.com>
+
+       * i386-gen.c (cpu_flag_init): Correct last change.
+
+2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS.  Remove
+       CPU_ANY_SSE4_FLAGS.
+
+2020-02-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.tbl (movsx): Remove Intel syntax comments.
+       (movzx): Likewise.
+
+2020-02-14  Jan Beulich  <jbeulich@suse.com>
+
+       PR gas/25438
+       * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
+       destination for Cpu64-only variant.
+       (movzx): Fold patterns.
+       * i386-tbl.h: Re-generate.
+
 2020-02-13  Jan Beulich  <jbeulich@suse.com>
 
        * i386-gen.c (cpu_flag_init): Move CpuSSE4a from