* Makefile.am (SOURCE_HFILES): Add `elf-linux-psinfo.h'.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
index c593d9dbd40ed255915b05c339e5552aff386112..a3d33dfd750d670f53d3f5a5490d32edaf62560d 100644 (file)
@@ -1,9 +1,35 @@
+2013-02-04  Alan Modra  <amodra@gmail.com>
+
+       * po/POTFILES.in: Regenerate.
+       * rl78-decode.c: Regenerate.
+       * rx-decode.c: Regenerate.
+
+2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
+       ushll2 with F_HAS_ALIAS.  Add entries for sxtl, sxtl2, uxtl and uxtl2.
+       * aarch64-asm.c (convert_xtl_to_shll): New function.
+       (convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
+       calling convert_xtl_to_shll.
+       * aarch64-dis.c (convert_shll_to_xtl): New function.
+       (convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
+       calling convert_shll_to_xtl.
+       * aarch64-gen.c: Update copyright year.
+       * aarch64-asm-2.c: Re-generate.
+       * aarch64-dis-2.c: Re-generate.
+       * aarch64-opc-2.c: Re-generate.
+
+2013-01-24  Nick Clifton  <nickc@redhat.com>
+
+       * v850-dis.c: Add support for e3v5 architecture.
+       * v850-opc.c: Likewise.
+
 2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>
 
        * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
        * aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
        * aarch64-opc.c (operand_general_constraint_met_p): For
-       AARCH64_MOD_LSL, move the range check on the shift amount before the 
+       AARCH64_MOD_LSL, move the range check on the shift amount before the
        alignment check; change to call set_sft_amount_out_of_range_error
        instead of set_imm_out_of_range_error.
        * aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
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