Fix the disassembly of the LDS and STS instructions of the AVR architecture.

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d5b412275fc0b60c9457942817e4e4161a7907f8..acde7a25313d96930a7bd55152844192b5f3cc24 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,35 @@
+2019-10-09  Nick Clifton  <nickc@redhat.com>
+
+       PR 25041
+       * avr-dis.c (avr_operand): Fix construction of address for lds/sts
+       instructions.
+
+2019-10-07  Jan Beulich  <jbeulich@suse.com>
+
+       * opcodes/i386-opc.tbl (movsd): Add Dword and IgnoreSize.
+       (cmpsd): Likewise. Move EsSeg to other operand.
+       * opcodes/i386-tbl.h: Re-generate.
+
+2019-09-23  Alan Modra  <amodra@gmail.com>
+
+       * m68k-dis.c: Include cpu-m68k.h
+
+2019-09-23  Alan Modra  <amodra@gmail.com>
+
+       * mips-dis.c: Include elfxx-mips.h.  Move "elf-bfd.h" and
+       "elf/mips.h" earlier.
+
+2018-09-20  Jan Beulich  <jbeulich@suse.com>
+
+       PR gas/25012
+       * i386-opc.tbl (push, pop): Re-instate distinct Cpu64 templates
+       with SReg operand.
+       * i386-tbl.h: Re-generate.
+
+2019-09-18  Alan Modra  <amodra@gmail.com>
+
+       * arc-ext.c: Update throughout for bfd section macro changes.
+
 2019-09-18  Simon Marchi  <simon.marchi@polymtl.ca>
 
        * Makefile.in: Re-generate.