-2008-12-30 Martin Schwidefsky <schwidefskyy@de.ibm.com>
+2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
- * s390-opc.txt: Add ptff instruction.
-
-2008-12-24 Jan Kratochvil <jan.kratochvil@redhat.com>
-
- * Makefile.am (CFILES, ALL_MACHINES): Add LM32 source and object files.
+ * Makefile.am (install-pdf, install-html): Remove.
* Makefile.in: Regenerate.
-2008-12-23 Jon Beniston <jon@beniston.com>
-
- * Makefile.am: Add LM32 object files and dependencies.
* Makefile.in: Regenerate.
- * configure.in: Add LM32 target.
- * configure: Regenerate.
- * disassemble.c: Add LM32 disassembler.
- * cgen-asm.in: Update copyright year.
- * cgen-dis.in: Update copyright year.
- * cgen-ibld.in: Update copyright year.
- * lm32-asm.c: New file.
- * lm32-desc.c: New file.
- * lm32-desc.h: New file.
- * lm32-dis.c: New file.
- * lm32-ibld.c: New file.
- * lm32-opc.c: New file.
- * lm32-opc.h: New file.
- * lm32-opinst.c: New file.
-
-2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (EXdS): New.
- (EXdVexS): Likewise.
- (EXqVexS): Likewise.
- (d_swap_mode): Likewise.
- (q_mode): Updated.
- (prefix_table): Use EXdS on movss and EXqS on movsd.
- (vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
- (intel_operand_size): Handle d_swap_mode.
- (OP_EX): Likewise.
-
- * i386-opc.h (S): Update comments.
-
- * i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
- * i386-tbl.h: Regenerated.
-
-2008-12-23 Nick Clifton <nickc@redhat.com>
-
- * po/ga.po: Updated Irish translation.
-
-2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (EbS): New.
- (EvS): Likewise.
- (EMS): Likewise.
- (EXqS): Likewise.
- (EXxS): Likewise.
- (b_swap_mode): Likewise.
- (v_swap_mode): Likewise.
- (q_swap_mode): Likewise.
- (x_swap_mode): Likewise.
- (v_mode): Updated.
- (w_mode): Likewise.
- (t_mode): Likewise.
- (xmm_mode): Likewise.
- (swap_operand): Likewise.
- (dis386): Use EbS on movB. Use EvS on moveS.
- (dis386_twobyte): Use EXxS on movapX.
- (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
- vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
- (vex_table): Use EXxS on vmovapX.
- (vex_len_table): Use EXqS on vmovq.
- (intel_operand_size): Handle b_swap_mode, v_swap_mode,
- q_swap_mode and x_swap_mode.
- (OP_E_register): Handle b_swap_mode and v_swap_mode.
- (OP_EM): Handle v_swap_mode.
- (OP_EX): x_swap_mode and q_swap_mode.
-
- * i386-gen.c (opcode_modifiers): Add S.
-
- * i386-opc.h (S): New.
- (Modrm): Updated.
- (i386_opcode_modifier): Add s.
-
- * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
- movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
- * i386-tbl.h: Regenerated.
-
-2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (mnemonicendp): New.
- (op): Likewise.
- (print_insn): Use mnemonicendp.
- (OP_3DNowSuffix): Likewise.
- (CMP_Fixup): Likewise.
- (CMPXCHG8B_Fixup): Likewise.
- (CRC32_Fixup): Likewise.
- (OP_DREX_FCMP): Likewise.
- (OP_DREX_ICMP): Likewise.
- (VZERO_Fixup): Likewise.
- (VCMP_Fixup): Likewise.
- (PCLMUL_Fixup): Likewise.
- (VPERMIL2_Fixup): Likewise.
- (MOVBE_Fixup): Likewise.
- (putop): Update mnemonicendp.
- (oappend): Use stpcpy.
- (simd_cmp_op): Changed to struct op.
- (vex_cmp_op): Likewise.
- (pclmul_op): Likewise.
- (vpermil2_op): Likewise.
+ * aclocal.m4: Likewise.
+ * config.in: Likewise.
+ * configure: Likewise.
-2008-12-18 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+2009-08-06 Michael Eager <eager@eagercon.com>
+ * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
+ CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
+ * Makefile.in: Regenerate.
+ * configure.in: Add bfd_microblaze_arch target.
* configure: Regenerate.
+ * disassemble.c: Define ARCH_microblaze, return
+ print_insn_microblaze().
+ * microblaze-dis.c: New MicroBlaze disassembler.
+ * microblaze-opc.h: New MicroBlaze opcode definitions.
+ * microblaze-opcm.h: New MicroBlaze opcode types.
-2008-12-15 Richard Earnshaw <rearnsha@arm.com>
-
- * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
- unified syntax.
-
-2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
-
-2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (putop): Remove strayed comments.
-
-2008-12-04 Ben Elliston <bje@au.ibm.com>
-
- * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
- for -Mbooke.
- (print_ppc_disassembler_options): Update usage.
- * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
- (BOOKE64): Remove.
- (PPCCHLK64): Likewise.
- (powerpc_opcodes): Remove all BOOKE64 instructions.
-
-2008-11-28 Joshua Kinard <kumba@gentoo.org>
-
- * mips-dis.c (mips_arch_choices): Add r14000, r16000.
-
-2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
-
- * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
- adjusted the mask for 32-bit branch instruction.
-
-2008-11-27 Alan Modra <amodra@bigpond.net.au>
-
- * ppc-opc.c (extract_sprg): Correct operand range check.
-
-2008-11-26 Andreas Schwab <schwab@suse.de>
-
- * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
- (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
- (save_printer, save_print_address): Remove.
- (fetch_data): Don't use them.
- (match_insn_m68k): Always restore printing functions.
- (print_insn_m68k): Don't save/restore printing functions.
-
-2008-11-25 Nick Clifton <nickc@redhat.com>
-
- * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
-
-2008-11-18 Catherine Moore <clm@codesourcery.com>
-
- * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
- instructions.
- (neon_opcodes): Likewise.
- (print_insn_coprocessor): Print 't' or 'b' for vcvt
- instructions.
+2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
-2008-11-14 Tristan Gingold <gingold@adacore.com>
+ * configure.in: Handle bfd_l1om_arch.
+ * disassemble.c (disassembler): Likewise.
- * makefile.vms (OBJS): Update list of objects.
- (DEFS): Update
- (CFLAGS): Update.
-
-2008-11-06 Chao-ying Fu <fu@mips.com>
-
- * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
- before sync.
- (sync): New instruction with 5-bit sync type.
- * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
-
-2008-11-06 Nick Clifton <nickc@redhat.com>
-
- * avr-dis.c: Replace uses of sprintf without a format string with
- calls to strcpy.
-
-2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.tbl: Add cmovpe and cmovpo.
- * i386-tbl.h: Regenerated.
-
-2008-10-22 Nick Clifton <nickc@redhat.com>
-
- PR 6937
- * configure.in (SHARED_LIBADD): Revert previous change.
- Add a comment explaining why.
- (SHARED_DEPENDENCIES): Revert previous change.
- * configure: Regenerate.
-
-2008-10-10 Nick Clifton <nickc@redhat.com>
-
- PR 6937
- * configure.in (SHARED_LIBADD): Add libiberty.a.
- (SHARED_DEPENDENCIES): Add libiberty.a.
+ * configure: Regenerated.
-2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-dis.c (print_insn): Handle bfd_mach_l1om and
+ bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
- * i386-gen.c: Include "hashtab.h".
- (next_field): Take a new argument, last. Check last.
- (process_i386_cpu_flag): Updated.
- (process_i386_opcode_modifier): Likewise.
+ * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
+ Add CPU_L1OM_FLAGS.
+ (cpu_flags): Add CpuL1OM.
+ (set_bitfield): Take an argument to set the value field.
+ (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
+ (process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
- (process_i386_registers): Likewise.
- (output_i386_opcode): New.
- (opcode_hash_entry): Likewise.
- (opcode_hash_table): Likewise.
- (opcode_hash_hash): Likewise.
- (opcode_hash_eq): Likewise.
- (process_i386_opcodes): Use opcode hash table and opcode array.
-
-2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
-
- * s390-opc.txt (stdy, stey): Fix description
-
-2008-09-30 Alan Modra <amodra@bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
-
-2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
-
- * aclocal.m4: Regenerated.
- * configure: Likewise.
- * Makefile.in: Likewise.
-
-2008-09-29 Nick Clifton <nickc@redhat.com>
-
- * po/vi.po: Updated Vietnamese translation.
- * po/fr.po: Updated French translation.
-
-2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
- (cfxr, cfdr, cfer, clclu): Add esa flag.
- (sqd): Instruction added.
- (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
- * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
+ * i386-opc.h (CpuL1OM): New.
+ (CpuXsave): Updated.
+ (i386_cpu_flags): Add cpul1om.
+
+2009-07-24 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
+ frstpm.
+ * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
+ (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
+ (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
+ * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
+ Define.
+ (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
+ and cpufisttp.
+ * i386-opc.tbl: Qualify floating point instructions by their
+ respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
+ and fsincos to be avilable only on 387. Fix fstsw ax to be
+ available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
+ and frstpm.
+ * i386-init.h, i386-tbl.h: Regenerate.
+
+2009-07-20 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
+ offset or indexed based addressing mode 3.
+
+2009-07-14 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
+ patterns.
+ (arm_decode_shift): Catch illegal register based shifts.
+ (print_insn_arm): Properly handle negative register r0
+ post-indexed addressing.
+
+2009-07-10 Doug Kwan <dougkwan@google.com>
+
+ * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
+ lower 32 bits of long types to make hexadecimal output consistent
+ on both 32-bit and 64-bit hosts.
+
+2009-07-10 Alan Modra <amodra@bigpond.net.au>
+
+ * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
+ * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
+ * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
+ * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
+ * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
+ * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
+ * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
+ * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
+ * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
+ * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
+ * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
+ * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
+
+2009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
+
+ * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
+
+2009-07-07 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
+ addressing modes.
+
+2009-07-06 DJ Delorie <dj@redhat.com>
+
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
+
+2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+
+ * i386-opc.h (CpuFMA4): Add CpuFMA4.
+ (i386_cpu_flags): New.
+ * i386-gen.c: Add CPU_FMA4_FLAGS.
+ * i386-opc.tbl: Add FMA4 instructions.
+ * i386-tbl.h: Regenerate.
+ * i386-init.h: Regenerate.
+ * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
+ (OP_XMM_VexW): Ditto.
+ (OP_EX_VexW): Ditto.
+ (VEXI4_Fixup): Ditto.
+ (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
+ (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
+ (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
+ (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
+ (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
+ (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
+ (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
+ (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
+ (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
+ (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
+ (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
+ (get_vex_imm8): New. handle FMA4.
+ (OP_EX_VexReg): Ditto.
+
+2009-06-30 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (coprocessor): Print the LDC and STC versions of the
+ LFM and SFM instructions as comments,.
+ Improve consistency of formatting for instructions displayed as
+ comments and decimal values displayed with their hexadecimal
+ equivalents.
+ Formatting tidy ups.
+
+2009-06-29 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (enum opcode_sentinels): New: Used to mark the
+ boundary between variaant and generic coprocessor instuctions.
+ (coprocessor): Use it.
+ Fix architecture version of MCRR and MRRC instructions.
+ (arm_opcdes): Fix patterns for STRB and STRH instructions.
+ (print_insn_coprocessor): Check architecture and extension masks.
+ Print a hexadecimal version of any decimal constant that is
+ outside of the range of -16 to +32.
+ (print_arm_address): Add a return value of the offset used in the
+ adress, if it is worth printing a hexadecimal version of it.
+ (print_insn_neon): Print a hexadecimal version of any decimal
+ constant that is outside of the range of -16 to +32.
+ (print_insn_arm): Likewise.
+ (print_insn_thumb16): Likewise.
+ (print_insn_thumb32): Likewise.
+
+ PR 10297
+ * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
+ of an undefined instruction.
+ (arm_opcodes): Use it.
+ (thumb_opcod): Use it.
+ (thumb32_opc): Use it.
+
+2009-06-23 DJ Delorie <dj@redhat.com>
+
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+
+ * mep-asm.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
+
+2009-06-22 Nick Clifton <nickc@redhat.com>
+
+ * po/fi.po: Updated Finish translation.
+
+2009-06-22 Alan Modra <amodra@bigpond.net.au>
+
+ * m32c-asm.c: Regenerate.
+
+2009-06-22 Alan Modra <amodra@bigpond.net.au>
+
+ * score-dis.c (print_insn_score48, print_insn_score32): Move default
+ case label to proper lexical block.
+ * score7-dis.c (print_insn_score32): Likewise.
+
+2009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
+
+ * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
+ MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
+ * s390-opc.txt (nopr, nop): Use new instruction format.
+
+2009-06-18 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (print_insn_coprocessor): Check that a user specified
+ ARM architecture supports the matched instruction.
+ (print_insn_arm): Likewise.
+ (select_arm_features): New function. Fills in the fields of an
+ arm_feature_set structure based on a given arm machine number.
+ (print_insn): Initialise an arm_feature_set structure.
+
+2009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * vax-dis.c (is_function_entry): Return success for synthetic
+ symbols too.
+ (is_plt_tail): New function.
+ (print_insn_vax): Decode PLT entry offset longword.
+
+2009-06-15 Nick Clifton <nickc@redhat.com>
+
+ PR 10186
+ * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
+ instruction.
+
+ PR 10173
+ * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
-2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
+2009-06-15 Nick Clifton <nickc@redhat.com>
- * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
- (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
+ PR 10263
+ * arm-dis.c (print_insn): Ignore is_data if the user has requested
+ the disassembly of data as well as instructions.
-2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
+2009-06-11 Doug Evans <dje@sebabeach.org>
- * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
- * i386-tbl.h: Regenerated.
+ * cgen.sh: Handle multiple simultaneous runs for parallel makes.
-2008-08-28 Jan Beulich <jbeulich@novell.com>
+2009-06-11 Anthony Green <green@moxielogic.com>
- * i386-dis.c (dis386): Adjust far return mnemonics.
- * i386-opc.tbl: Add retf.
- * i386-tbl.h: Re-generate.
+ * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
+ (moxie_form3_opc_info): Add branch instructions.
+ * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
+ encoded instructions.
-2008-08-28 Jan Beulich <jbeulich@novell.com>
+2009-06-06 Anthony Green <green@moxielogic.com>
- * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
+ * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
+ * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
-2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
+2009-06-04 Alan Modra <amodra@bigpond.net.au>
- * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
- * ia64-gen.c (lookup_specifier): Likewise.
+ * dep-in.sed: Don't use \n in replacement part of s command.
+ * Makefile.am (DEP1): LC_ALL for uniq.
+ * Makefile.in: Regenerate.
- * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
- * ia64-raw.tbl: Likewise.
- * ia64-waw.tbl: Likewise.
- * ia64-asmtab.c: Regenerated.
+2009-06-02 Nick Clifton <nickc@redhat.com>
-2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
+ * po/nl.po: Updated Dutch translation.
- * i386-opc.tbl: Correct fidivr operand size.
+2009-06-02 Tristan Gingold <gingold@adacore.com>
- * i386-tbl.h: Regenerated.
+ * ia64-gen.c (parse_resource_users, print_dependency_table,
+ add_dis_table_ent, finish_distable, insert_bit_table_ent,
+ add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
+ get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
+ insert_completer_entry, print_completer_entry, print_completer_table,
+ opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
-2008-08-24 Alan Modra <amodra@bigpond.net.au>
+2009-05-28 DJ Delorie <dj@redhat.com>
- * configure.in: Update a number of obsolete autoconf macros.
- * aclocal.m4: Regenerate.
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
-2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
+2009-05-26 DJ Delorie <dj@redhat.com>
- AVX Programming Reference (August, 2008)
- * i386-dis.c (PREFIX_VEX_38DB): New.
- (PREFIX_VEX_38DC): Likewise.
- (PREFIX_VEX_38DD): Likewise.
- (PREFIX_VEX_38DE): Likewise.
- (PREFIX_VEX_38DF): Likewise.
- (PREFIX_VEX_3ADF): Likewise.
- (VEX_LEN_38DB_P_2): Likewise.
- (VEX_LEN_38DC_P_2): Likewise.
- (VEX_LEN_38DD_P_2): Likewise.
- (VEX_LEN_38DE_P_2): Likewise.
- (VEX_LEN_38DF_P_2): Likewise.
- (VEX_LEN_3ADF_P_2): Likewise.
- (PREFIX_VEX_3A04): Updated.
- (VEX_LEN_3A06_P_2): Likewise.
- (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
- PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
- (x86_64_table): Likewise.
- (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
- VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
- VEX_LEN_3ADF_P_2.
-
- * i386-opc.tbl: Add AES + AVX instructions.
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
-2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+2009-05-26 Nick Clifton <nickc@redhat.com>
- * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
- * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
+ * po/id.po: Updated Indonesian translation.
+ * po/opcodes.pot: Updated template file.
-200
8-08-15 Alan Modra <amodra@bigpond.net.au>
+200
9-05-26 Alan Modra <amodra@bigpond.net.au>
- PR 6526
- * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
+ * dep-in.sed: Don't modify .o to .lo here. Output one filename
+ per line with all lines having continuation backslash. Prefix
+ first line with "A", following lines with "B".
+ * Makefile.am (DEP): Don't use dep.sed here.
+ (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
+ dep.sed here on dependencies, sort and uniq.
* Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * config.in: Regenerate.
- * configure: Regenerate.
-
-2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
-
- PR 6825
- * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
-
-2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.tbl: Add syscall and sysret for Cpu64.
-
- * i386-tbl.h: Regenerated.
-2008-08-04 Alan Modra <amodra@bigpond.net.au>
+2009-05-25 Tristan Gingold <gingold@adacore.com>
+
+ * makefile.vms (OPT): New variable.
+ (CFLAGS): Update compilation flags.
+
+2009-05-22 DJ Delorie <dj@redhat.com>
+
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
+
+2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+
+ * i386-opc.h (Cpusse5): Delete.
+ (i386_cpu_flags): Delete.
+ * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
+ * i386-opc.tbl: Remove SSE5 instructions.
+ * i386-tbl.h: Regenerate.
+ * i386-init.h: Regenerate.
+ * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
+ (print_drex_arg): Delete.
+ (OP_DREX4): Delete.
+ (OP_DREX3): Delete.
+ (OP_DREX_ICMP): Delete.
+ (OP_DREX_FCMP): Delete.
+ (DREX_*): Delete.
+ (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
+
+2009-05-22 Alan Modra <amodra@bigpond.net.au>
- * Makefile.am (POTFILES.in): Set LC_ALL=C.
+ * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
-2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
-
- * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
- (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
- (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
- * ppc-opc.c (insert_xt6): New static function.
- (extract_xt6): Likewise.
- (insert_xa6): Likewise.
- (extract_xa6: Likewise.
- (insert_xb6): Likewise.
- (extract_xb6): Likewise.
- (insert_xb6s): Likewise.
- (extract_xb6s): Likewise.
- (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
- XX3DM_MASK, PPCVSX): New.
- (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
- "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
-
-2008-08-01 Pedro Alves <pedro@codesourcery.com>
-
- * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
- * Makefile.in: Regenerate.
-
-2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-reg.tbl: Use Dw2Inval on AVX registers.
- * i386-tbl.h: Regenerated.
-
-2008-07-30 Michael J. Eager <eager@eagercon.com>
-
- * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
- * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
- (insert_sprg, PPC405): Use PPC_OPCODE_405.
- (powerpc_opcodes): Add Xilinx APU related opcodes.
+2009-05-19 DJ Delorie <dj@redhat.com>
-2008-07-30 Alan Modra <amodra@bigpond.net.au>
+ * mep-asm.c: Regenerate.
+ * mep-opc.c: Regenerate.
- * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
+2009-04-30 DJ Delorie <dj@redhat.com>
-2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
- * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
+2009-04-17 DJ Delorie <dj@redhat.com
-2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
+ * mep-desc.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
- * mips-opc.c (CP): New macro.
- (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
- membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
- dmtc2 Octeon instructions.
+2009-04-15 Anthony Green <green@moxielogic.com>
-2008-07-07 Stan Shebs <stan@codesourcery.com>
+ * moxie-opc.c, moxie-dis.c: Created.
+ * Makefile.am: Build the moxie source files.
+ * configure.in: Add moxie support.
+ * Makefile.in, configure: Rebuilt.
+ * disassemble.c (disassembler): Add moxie support.
+ (ARCH_moxie): Define.
- * dis-init.c (init_disassemble_info): Init endian_code field.
- * arm-dis.c (print_insn): Disassemble code according to
- setting of endian_code.
- (print_insn_big_arm): Detect when BE8 extension flag has been set.
+2009-04-15 Jan Beulich <jbeulich@novell.com>
-2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
+ * i386-opc.tbl (protb, protw, protd, protq): Set opcode
+ extension to None.
+ (pshab, pshaw, pshad, pshaq): Likewise.
+ * i386-tbl.h: Re-generate.
- * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
- for ELF symbols.
+2009-04-08 DJ Delorie <dj@redhat.com
-2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
- * ppc-dis.c (powerpc_init_dialect): Handle -M464.
- (print_ppc_disassembler_options): Likewise.
- * ppc-opc.c (PPC464): Define.
- (powerpc_opcodes): Add mfdcrux and mtdcrux.
+2009-04-07 Peter Bergner <bergner@vnet.ibm.com>
-2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+ * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
+ "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
+ Reorder entries so the extended mnemonics are listed before tlbilx.
- * configure: Regenerate.
+2009-04-02 Peter Bergner <bergner@vnet.ibm.com>
-2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
-
- * ppc-dis.c (print_insn_powerpc): Update prototye to use new
- ppc_cpu_t typedef.
- (struct dis_private): New.
- (POWERPC_DIALECT): New define.
- (powerpc_dialect): Renamed to...
- (powerpc_init_dialect): This. Update to use ppc_cpu_t and
- struct dis_private.
- (print_insn_big_powerpc): Update for using structure in
- info->private_data.
- (print_insn_little_powerpc): Likewise.
- (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
- (skip_optional_operands): Likewise.
- (print_insn_powerpc): Likewise. Remove initialization of dialect.
- * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
- extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
- extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
- extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
- insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
- insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
- insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
- param to be of type ppc_cpu_t. Update prototype.
-
-2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
-
- * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
- +s, +S.
- * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
- baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
- syncw, syncws, vm3mulu, vm0 and vmulu.
-
- * mips-dis.c (print_insn_args): Handle field descriptor +Q.
- * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
- seqi, sne and snei.
-
-2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.tbl: Add vmovd with 64bit operand.
- * i386-tbl.h: Regenerated.
+ * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
+ due to -many/-Many.
+ (print_insn_powerpc): Make sure we only deprecate instructions using
+ the original dialect and not a modified dialect due to -Many handling.
+ Move the handling of the condition register and default operands to
+ the end of the if/else if/else chain.
+ * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
+ instructions from newer processors are listed before older ones.
+ <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
+ that have instructions with conflicting opcodes.
-2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
+2009-04-01 Peter Bergner <bergner@vnet.ibm.com>
- * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
+ * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
+ E500MC entries.
-2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
+2009-04-01 Christophe Lyon <christophe.lyon@st.com>
- * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
- * i386-tbl.h: Regenerated.
+ * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
-2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
+2009-03-30 Joseph Myers <joseph@codesourcery.com>
- PR gas/6517
- * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
- into 32bit and 64bit. Remove Reg64|Qword and add
- IgnoreSize|No_qSuf on 32bit version.
- * i386-tbl.h: Regenerated.
-
-2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
+ * arm-dis.c (print_insn): Also check section matches in backwards
+ search for mapping symbol.
- * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
- * i386-tbl.h: Regenerated.
+2009-03-26 H.J. Lu <hongjiu.lu@intel.com>
-2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
+ * i386-dis.c (get_valid_dis386): Abort on unhandled table.
- * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
-
-2008-05-14 Alan Modra <amodra@bigpond.net.au>
+2009-03-18 Alan Modra <amodra@bigpond.net.au>
+ * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
+ * openrisc-opc.c: Regenerate.
-2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (MOVBE_Fixup): New.
- (Mo): Likewise.
- (PREFIX_0F3880): Likewise.
- (PREFIX_0F3881): Likewise.
- (PREFIX_0F38F0): Updated.
- (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
- PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
- (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
-
- * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
- CPU_EPT_FLAGS.
- (cpu_flags): Add CpuMovbe and CpuEPT.
-
- * i386-opc.h (CpuMovbe): New.
- (CpuEPT): Likewise.
- (CpuLM): Updated.
- (i386_cpu_flags): Add cpumovbe and cpuept.
-
- * i386-opc.tbl: Add entries for movbe and EPT instructions.
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
+2009-03-10 Nick Clifton <nickc@redhat.com>
-2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
+ * po/id.po: Updated Indonesian translation.
- * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
- the two drem and the two dremu macros.
+2009-03-10 Alan Modra <amodra@bigpond.net.au>
-2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
+ * ppc-dis.c: Include "opintl.h".
+ (struct ppc_mopt, ppc_opts): New.
+ (ppc_parse_cpu): New function.
+ (powerpc_init_dialect): Use it.
+ (print_ppc_disassembler_options): Dump options from ppc_opts.
+ Internationalize message.
- * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
- instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
- cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
- INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
+2009-03-06 Nick Clifton <nickc@redhat.com>
-2008-04-25 David S. Miller <davem@davemloft.net>
+ * po/es.po: Updated Spanish translation.
- * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
- instead of %sys_tick_cmpr, as suggested in architecture manuals.
+2009-03-04 Alan Modra <amodra@bigpond.net.au>
-2008-04-23 Paolo Bonzini <bonzini@gnu.org>
-
- * aclocal.m4: Regenerate.
+ PR 6768
+ * configure.in: Test for ld --as-needed support. Link shared
+ libopcodes against libm.
* configure: Regenerate.
-2008-04-23 David S. Miller <davem@davemloft.net>
-
- * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
- extended values.
- (prefetch_table): Add missing values.
-
-2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (opcode_modifiers): Add NoAVX.
-
- * i386-opc.h (NoAVX): New.
- (OldGcc): Updated.
- (i386_opcode_modifier): Add noavx.
-
- * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
- instructions which don't have AVX equivalent.
- * i386-tbl.h: Regenerated.
-
-2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_VEX_FMA): New.
- (OP_EX_VexImmW): Likewise.
- (VexFMA): Likewise.
- (Vex128FMA): Likewise.
- (EXVexImmW): Likewise.
- (get_vex_imm8): Likewise.
- (OP_EX_VexReg): Likewise.
- (vex_i4_done): Renamed to ...
- (vex_w_done): This.
- (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
- and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
- FMA instructions.
- (print_insn): Updated.
- (OP_EX_VexW): Rewrite to swap register in VEX with EX.
- (OP_REG_VexI4): Check invalid high registers.
-
-2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
- Michael Meissner <michael.meissner@amd.com>
-
- * i386-opc.tbl: Fix protX to allow memory in the middle operand.
- * i386-tbl.h: Regenerate from i386-opc.tbl.
-
-2008-04-14 Edmar Wienskoski <edmar@freescale.com>
-
- * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
- accept Power E500MC instructions.
- (print_ppc_disassembler_options): Document -Me500mc.
- * ppc-opc.c (DUIS, DUI, T): New.
- (XRT, XRTRA): Likewise.
- (E500MC): Likewise.
- (powerpc_opcodes): Add new Power E500MC instructions.
-
-2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-dis.c (init_disasm): Evaluate disassembler_options.
- (print_s390_disassembler_options): New function.
- * disassemble.c (disassembler_usage): Invoke
- print_s390_disassembler_options.
+2009-03-03 Peter Bergner <bergner@vnet.ibm.com>
-2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
+ * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
+ instructions from newer processors are listed before older ones.
- * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
- of local variables used for mnemonic parsing: prefix, suffix and
- number.
-
-2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
- extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
- (s390_crb_extensions): New extensions table.
- (insertExpandedMnemonic): Handle '$' tag.
- * s390-opc.txt: Remove conditional jump variants which can now
- be expanded automatically.
- Replace '*' tag with '$' in the compare and branch instructions.
-
-2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
- (PREFIX_VEX_3AXX): Likewis.
-
-2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.tbl: Remove 4 extra blank lines.
-
-2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
- with CPU_PCLMUL_FLAGS/CpuPCLMUL.
- (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
- * i386-opc.tbl: Likewise.
-
- * i386-opc.h (CpuCLMUL): Renamed to ...
- (CpuPCLMUL): This.
- (CpuFMA): Updated.
- (i386_cpu_flags): Replace cpuclmul with cpupclmul.
-
- * i386-init.h: Regenerated.
-
-2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_E_register): New.
- (OP_E_memory): Likewise.
- (OP_VEX): Likewise.
- (OP_EX_Vex): Likewise.
- (OP_EX_VexW): Likewise.
- (OP_XMM_Vex): Likewise.
- (OP_XMM_VexW): Likewise.
- (OP_REG_VexI4): Likewise.
- (PCLMUL_Fixup): Likewise.
- (VEXI4_Fixup): Likewise.
- (VZERO_Fixup): Likewise.
- (VCMP_Fixup): Likewise.
- (VPERMIL2_Fixup): Likewise.
- (rex_original): Likewise.
- (rex_ignored): Likewise.
- (Mxmm): Likewise.
- (XMM): Likewise.
- (EXxmm): Likewise.
- (EXxmmq): Likewise.
- (EXymmq): Likewise.
- (Vex): Likewise.
- (Vex128): Likewise.
- (Vex256): Likewise.
- (VexI4): Likewise.
- (EXdVex): Likewise.
- (EXqVex): Likewise.
- (EXVexW): Likewise.
- (EXdVexW): Likewise.
- (EXqVexW): Likewise.
- (XMVex): Likewise.
- (XMVexW): Likewise.
- (XMVexI4): Likewise.
- (PCLMUL): Likewise.
- (VZERO): Likewise.
- (VCMP): Likewise.
- (VPERMIL2): Likewise.
- (xmm_mode): Likewise.
- (xmmq_mode): Likewise.
- (ymmq_mode): Likewise.
- (vex_mode): Likewise.
- (vex128_mode): Likewise.
- (vex256_mode): Likewise.
- (USE_VEX_C4_TABLE): Likewise.
- (USE_VEX_C5_TABLE): Likewise.
- (USE_VEX_LEN_TABLE): Likewise.
- (VEX_C4_TABLE): Likewise.
- (VEX_C5_TABLE): Likewise.
- (VEX_LEN_TABLE): Likewise.
- (REG_VEX_XX): Likewise.
- (MOD_VEX_XXX): Likewise.
- (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
- (PREFIX_0F3A44): Likewise.
- (PREFIX_0F3ADF): Likewise.
- (PREFIX_VEX_XXX): Likewise.
- (VEX_OF): Likewise.
- (VEX_OF38): Likewise.
- (VEX_OF3A): Likewise.
- (VEX_LEN_XXX): Likewise.
- (vex): Likewise.
- (need_vex): Likewise.
- (need_vex_reg): Likewise.
- (vex_i4_done): Likewise.
- (vex_table): Likewise.
- (vex_len_table): Likewise.
- (OP_REG_VexI4): Likewise.
- (vex_cmp_op): Likewise.
- (pclmul_op): Likewise.
- (vpermil2_op): Likewise.
- (m_mode): Updated.
- (es_reg): Likewise.
- (PREFIX_0F38F0): Likewise.
- (PREFIX_0F3A60): Likewise.
- (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
- (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
- and PREFIX_VEX_XXX entries.
- (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
- (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
- PREFIX_0F3ADF.
- (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
- Add MOD_VEX_XXX entries.
- (ckprefix): Initialize rex_original and rex_ignored. Store the
- REX byte in rex_original.
- (get_valid_dis386): Handle the implicit prefix in VEX prefix
- bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
- (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
- calling get_valid_dis386. Use rex_original and rex_ignored when
- printing out REX.
- (putop): Handle "XY".
- (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
- ymmq_mode.
- (OP_E_extended): Updated to use OP_E_register and
- OP_E_memory.
- (OP_XMM): Handle VEX.
- (OP_EX): Likewise.
- (XMM_Fixup): Likewise.
- (CMP_Fixup): Use ARRAY_SIZE.
-
- * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
- CPU_FMA_FLAGS and CPU_AVX_FLAGS.
- (operand_type_init): Add OPERAND_TYPE_REGYMM and
- OPERAND_TYPE_VEX_IMM4.
- (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
- (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
- VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
- VexImmExt and SSE2AVX.
- (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
-
- * i386-opc.h (CpuAVX): New.
- (CpuAES): Likewise.
- (CpuCLMUL): Likewise.
- (CpuFMA): Likewise.
- (Vex): Likewise.
- (Vex256): Likewise.
- (VexNDS): Likewise.
- (VexNDD): Likewise.
- (VexW0): Likewise.
- (VexW1): Likewise.
- (Vex0F): Likewise.
- (Vex0F38): Likewise.
- (Vex0F3A): Likewise.
- (Vex3Sources): Likewise.
- (VexImmExt): Likewise.
- (SSE2AVX): Likewise.
- (RegYMM): Likewise.
- (Ymmword): Likewise.
- (Vex_Imm4): Likewise.
- (Implicit1stXmm0): Likewise.
- (CpuXsave): Updated.
- (CpuLM): Likewise.
- (ByteOkIntel): Likewise.
- (OldGcc): Likewise.
- (Control): Likewise.
- (Unspecified): Likewise.
- (OTMax): Likewise.
- (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
- (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
- vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
- vex3sources, veximmext and sse2avx.
- (i386_operand_type): Add regymm, ymmword and vex_imm4.
-
- * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
-
- * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
-
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
-
-2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
-
- From Robin Getz <robin.getz@analog.com>
- * bfin-dis.c (bu32): Typedef.
- (enum const_forms_t): Add c_uimm32 and c_huimm32.
- (constant_formats[]): Add uimm32 and huimm16.
- (fmtconst_val): New.
- (uimm32): Define.
- (huimm32): Define.
- (imm16_val): Define.
- (luimm16_val): Define.
- (struct saved_state): Define.
- (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
- A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
- LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
- (get_allreg): New.
- (decode_LDIMMhalf_0): Print out the whole register value.
-
- From Jie Zhang <jie.zhang@analog.com>
- * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
- multiply and multiply-accumulate to data register instruction.
-
- * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
- c_imm32, c_huimm32e): Define.
- (constant_formats): Add flags for printing decimal, leading spaces, and
- exact symbols.
- (comment, parallel): Add global flags in all disassembly.
- (fmtconst): Take advantage of new flags, and print default in hex.
- (fmtconst_val): Likewise.
- (decode_macfunc): Be consistant with spaces, tabs, comments,
- capitalization in disassembly, fix minor coding style issues.
- (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
- (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
- decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
- decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
- decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
- decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
- decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
- decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
- decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
- decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
- _print_insn_bfin, print_insn_bfin): Likewise.
-
-2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
-
- * aclocal.m4: Regenerate.
- * configure: Likewise.
- * Makefile.in: Likewise.
-
-2008-03-13 Alan Modra <amodra@bigpond.net.au>
+2009-03-03 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
+ (HFILES): Move lm32-desc.h and lm32-opc.h from..
+ (CFILES): ..here.
* Makefile.in: Regenerate.
- * configure: Regenerate.
-
-2008-03-07 Alan Modra <amodra@bigpond.net.au>
-
- * ppc-opc.c (powerpc_opcodes): Order and format.
-
-2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
- * i386-tbl.h: Regenerated.
-
-2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.tbl: Disallow 16-bit near indirect branches for
- x86-64.
- * i386-tbl.h: Regenerated.
-
-2008-02-21 Jan Beulich <jbeulich@novell.com>
-
- * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
- and Fword for far indirect jmp. Allow Reg16 and Word for near
- indirect jmp on x86-64. Disallow Fword for lcall.
- * i386-tbl.h: Re-generate.
-
-2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
-
- * cr16-opc.c (cr16_num_optab): Defined
-2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
+2009-03-02 Qinwei <qinwei@sunnorth.com.cn>
- * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
- * i386-init.h: Regenerated.
-
-2008-02-14 Nick Clifton <nickc@redhat.com>
-
- PR binutils/5524
- * configure.in (SHARED_LIBADD): Select the correct host specific
- file extension for shared libraries.
+ * score7-dis.c: New file.
+ * Makefile.am: Add dependencies for score7-dis.c.
+ * Makefile.in: Regenerate.
+ * configure.in: Add score7-dis to score files.
* configure: Regenerate.
+ * score-dis.c: Add support for score7 architecture.
+ * score-opc.h: Likewise.
-2008-02-13 Jan Beulich <jbeulich@novell.com>
-
- * i386-opc.h (RegFlat): New.
- * i386-reg.tbl (flat): Add.
- * i386-tbl.h: Re-generate.
-
-2008-02-13 Jan Beulich <jbeulich@novell.com>
-
- * i386-dis.c (a_mode): New.
- (cond_jump_mode): Adjust.
- (Ma): Change to a_mode.
- (intel_operand_size): Handle a_mode.
- * i386-opc.tbl: Allow Dword and Qword for bound.
- * i386-tbl.h: Re-generate.
-
-2008-02-13 Jan Beulich <jbeulich@novell.com>
-
- * i386-gen.c (process_i386_registers): Process new fields.
- * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
- unsigned char. Add dw2_regnum and Dw2Inval.
- * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
- register names.
- * i386-tbl.h: Re-generate.
-
-2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
- * i386-init.h: Updated.
+2009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
-2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (cpu_flags): Add CpuXsave.
+ * configure: Regenerate.
- * i386-opc.h (CpuXsave): New.
- (CpuLM): Updated.
- (i386_cpu_flags): Add cpuxsave.
-
- * i386-dis.c (MOD_0FAE_REG_4): New.
- (RM_0F01_REG_2): Likewise.
- (MOD_0FAE_REG_5): Updated.
- (RM_0F01_REG_3): Likewise.
- (reg_table): Use MOD_0FAE_REG_4.
- (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
- for xrstor.
- (rm_table): Add RM_0F01_REG_2.
-
- * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
+2009-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
+
+2009-02-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
+ the power7 and the isel instructions.
+ * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
+ (insert_dm, extract_dm): Likewise.
+ (XB6): Update comment to include XX2 form.
+ (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
+ XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
+ (RemoveXX3DM): Delete.
+ (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
+ "mftgpr">: Deprecate for POWER7.
+ <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
+ "frsqrte.">: Deprecate the three operand form and enable the two
+ operand form for POWER7 and later.
+ <"wait">: Extend to accept optional parameter. Enable for POWER7.
+ <"waitsrv", "waitimpl">: Add extended opcodes.
+ <"ldbrx", "stdbrx">: Enable for POWER7.
+ <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
+ <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
+ "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
+ "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
+ "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
+ "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
+ "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
+ "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
+ <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
+ "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
+ "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
+ "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
+ "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
+ "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
+ "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
+ "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
+ "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
+ "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
+ "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
+ "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
+ "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
+ "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
+ "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
+ "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
+ "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
+ "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
+ "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
+ "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
+ "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
+ "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
+ "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
+ "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
+ "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
+ "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
+ "xxspltw", "xxswapd">: Add VSX opcodes.
+
+2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
+ (operand_types): Remove Vex_Imm4.
+
+ * i386-opc.h (Vex_Imm4): Removed.
+ (OTMax): Updated.
+ (i386_operand_type): Remove vex_imm4.
+
+ * i386-opc.tbl: Remove Vex_Imm4 comments.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
-2008-02-11 Jan Beulich <jbeulich@novell.com>
-
- * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
- Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
- * i386-tbl.h: Re-generate.
-
-2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
+2009-02-23 Richard Earnshaw <rearnsha@arm.com>
- PR 5715
- * configure: Regenerated.
+ * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
+ vq{r}shr{u}n.s64 insnstructions.
-2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
+2009-02-19 Peter Bergner <bergner@vnet.ibm.com>
- * mips-dis.c: Update copyright.
- (mips_arch_choices): Add Octeon.
- * mips-opc.c: Update copyright.
- (IOCT): New macro.
- (mips_builtin_opcodes): Add Octeon instruction synciobdma.
+ * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
+ operand to be a float point register (FRT/FRS).
-2008-01-29 Alan Modra <amodra@bigpond.net.au>
+2009-02-18 Adam Nemet <anemet@caviumnetworks.com>
- * ppc-opc.c: Support optional L form mtmsr.
+ * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
+ dmfc2 and dmtc2 before the architecture-level variants.
-2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
+2009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
- * i386-dis.c (OP_E_extended): Handle r12 like rsp.
+ * fr30-opc.c: Regenerate.
+ * frv-opc.c: Regenerate.
+ * ip2k-opc.c: Regenerate.
+ * iq2000-opc.c: Regenerate.
+ * lm32-opc.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mt-opc.c: Regenerate.
+ * xc16x-opc.c: Regenerate.
+ * xstormy16-opc.c: Regenerate.
+ * tic54x-dis.c (print_instruction): Avoid compiler warning on
+ sprintf call.
-2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
+2009-02-12 Nathan Sidwell <nathan@codesourcery.com>
- * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
- * i386-init.h: Regenerated.
+ * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
-2008-01-23 Tristan Gingold <gingold@adacore.com>
-
- * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
- ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
-
-2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
- (cpu_flags): Likewise.
-
- * i386-opc.h (CpuMMX2): Removed.
- (CpuSSE): Updated.
-
- * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
+2009-02-05 Peter Bergner <bergner@vnet.ibm.com>
-2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
+ * ppc-opc.c: Update copyright year.
+ (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
+ ordering for POWER4 and later and use the correct Server ordering.
- * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
- CPU_SMX_FLAGS.
- * i386-init.h: Regenerated.
+2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
-2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
+ AVX Programming Reference (January, 2009)
+ * i386-dis.c (PREFIX_VEX_3A44): New.
+ (VEX_LEN_3A44_P_2): Likewise.
+ (PREFIX_VEX_3A48): Updated.
+ (VEX_LEN_3A4C_P_2): Likewise.
+ (prefix_table): Add PREFIX_VEX_3A44.
+ (vex_table): Likewise.
+ (vex_len_table): Add VEX_LEN_3A44_P_2.
- * i386-opc.tbl: Use Qword on movddup.
+ * i386-opc.tbl: Add PCLMUL + AVX instructions.
* i386-tbl.h: Regenerated.
-2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
+2009-02-03 Sandip Matte <sandip@rmicorp.com>
- * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
- * i386-tbl.h: Regenerated.
+ * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
+ (mips_arch_choices): Add XLR entry.
+ * mips-opc.c (XLR): Define.
+ (mips_builtin_opcodes): Add XLR instructions.
-2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
+2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
- * i386-dis.c (Mx): New.
- (PREFIX_0FC3): Likewise.
- (PREFIX_0FC7_REG_6): Updated.
- (dis386_twobyte): Use PREFIX_0FC3.
- (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
- Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
- movntss.
+ * Makefile.am: Add install-pdf target.
+ * po/Make-in: Add install-pdf target.
+ * Makefile.in: Regenerate.
-2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
+2009-02-02 DJ Delorie <dj@redhat.com>
- * i386-gen.c (opcode_modifiers): Add IntelSyntax.
- (operand_types): Add Mem.
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
- * i386-opc.h (IntelSyntax): New.
- * i386-opc.h (Mem): New.
- (Byte): Updated.
- (Opcode_Modifier_Max): Updated.
- (i386_opcode_modifier): Add intelsyntax.
- (i386_operand_type): Add mem.
+2009-01-29 Mark Mitchell <mark@codesourcery.com>
- * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
- instructions.
+ * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
+ qsub, and qdsub.
- * i386-reg.tbl: Add size for accumulator.
+2009-01-28 Chao-ying Fu <fu@mips.com>
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
+ * mips-opc.c (suxc1): Add the flag of FP_D.
-2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.h (Byte): Fix a typo.
-
-2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/5534
- * i386-gen.c (operand_type_init): Add Dword to
- OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
- (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
- Qword and Xmmword.
- (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
- Xmmword, Unspecified and Anysize.
- (set_bitfield): Make Mmword an alias of Qword. Make Oword
- an alias of Xmmword.
-
- * i386-opc.h (CheckSize): Removed.
- (Byte): Updated.
- (Word): Likewise.
- (Dword): Likewise.
- (Qword): Likewise.
- (Xmmword): Likewise.
- (FWait): Updated.
- (OTMax): Likewise.
- (i386_opcode_modifier): Remove checksize, byte, word, dword,
- qword and xmmword.
- (Fword): New.
- (TBYTE): Likewise.
- (Unspecified): Likewise.
- (Anysize): Likewise.
- (i386_operand_type): Add byte, word, dword, fword, qword,
- tbyte xmmword, unspecified and anysize.
-
- * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
- Tbyte, Xmmword, Unspecified and Anysize.
-
- * i386-reg.tbl: Add size for accumulator.
+2009-01-20 Alan Modra <amodra@bigpond.net.au>
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
+ * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
+ * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
+ * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
+ * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
+ * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
+ * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
+ * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
+ * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
-2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-16 Alan Modra <amodra@bigpond.net.au>
- * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
- (REG_0F18): Updated.
- (reg_table): Updated.
- (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
- (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
+ * configure.in (commonbfdlib): Delete.
+ (SHARED_LIBADD): Add pic libiberty if such is available.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
-2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-14 Peter Bergner <bergner@vnet.ibm.com>
- * i386-gen.c (set_bitfield): Use fail () on error.
+ * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
+ * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
+ operand form and enable the four operand form for POWER6 and later.
+ <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
+ three operand form for POWER6 and later.
-2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-14 Mike Frysinger <vapier@gentoo.org>
- * i386-gen.c (lineno): New.
- (filename): Likewise.
- (set_bitfield): Report filename and line numer on error.
- (process_i386_opcodes): Set filename and update lineno.
- (process_i386_registers): Likewise.
+ * bfin-dis.c (OUTS): Use "%s" as format string.
-2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-13 H.J. Lu <hongjiu.lu@intel.com>
- * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
- ATTSyntax.
+ * i386-gen.c (cpu_flag_init): Remove a white space.
+ (operand_type_init): Likewise.
- * i386-opc.h (IntelMnemonic): Renamed to ..
- (ATTSyntax): This
- (Opcode_Modifier_Max): Updated.
- (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
- and intelsyntax.
+2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
- on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
+ * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
* i386-tbl.h: Regenerated.
-2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
+ subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
+ subS, xorS and cmpS.
- * i386-gen.c: Update copyright to 2008.
- * i386-opc.h: Likewise.
- * i386-opc.tbl: Likewise.
+2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
+ CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
+ CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
+ (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
+ and CpuSYSCALL.
+ (lineno): Removed.
+ (set_bitfield): Take an argument, lineno. Don't report lineno
+ on error if it is -1.
+ (process_i386_cpu_flag): Take an argument, lineno.
+ (process_i386_opcode_modifier): Likewise.
+ (process_i386_operand_type): Likewise.
+ (output_i386_opcode): Likewise.
+ (opcode_hash_entry): Add lineno.
+ (process_i386_opcodes): Updated.
+ (process_i386_registers): Likewise.
+ (process_i386_initializers): Likewise.
+
+ * i386-opc.h (CpuP4): Removed.
+ (CpuK6): Likewise.
+ (CpuK8): Likewise.
+ (CpuClflush): New.
+ (CpuSYSCALL): Likewise.
+ (CpuMMX): Updated.
+ (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
+ cpuclflush and cpusyscall.
+
+ * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
+ syscall and sysret.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
-2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
- pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
- * i386-tbl.h: Regenerated.
-
-2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
+ and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
+ (cpu_flags): Add CpuRdtscp.
+ (set_bitfield): Remove CpuSledgehammer check.
- * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
- CpuSSE4_2_Or_ABM.
- (cpu_flags): Likewise.
-
- * i386-opc.h (CpuSSE4_1_Or_5): Removed.
- (CpuSSE4_2_Or_ABM): Likewise.
+ * i386-opc.h (CpuRdtscp): New.
(CpuLM): Updated.
- (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
+ (i386_cpu_flags): Add cpurdtscp.
- * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
- Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
- and CpuPadLock, respectively.
+ * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
-2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-09 Peter Bergner <bergner@vnet.ibm.com>
- * i386-gen.c (opcode_modifiers): Remove No_xSuf.
+ * ppc-opc.c (PPCNONE): Define.
+ (NOPOWER4): Delete.
+ (powerpc_opcodes): Initialize the new "deprecated" field.
- * i386-opc.h (No_xSuf): Removed.
- (CheckSize): Updated.
+2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
- * i386-tbl.h: Regenerated.
+ AVX Programming Reference (December, 2008)
+ * i386-dis.c (VEX_LEN_2B_M_0): Removed.
+ (VEX_LEN_E7_P_2_M_0): Likewise.
+ (VEX_LEN_2C_P_1): Updated.
+ (VEX_LEN_E8_P_2): Likewise.
+ (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
+ (mod_table): Likewise.
-2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
+ * i386-tbl.h: Regenerated.
- * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
- CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
- CPU_SSE5_FLAGS.
- (cpu_flags): Add CpuSSE4_2_Or_ABM.
+2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.h (CpuSSE4_2_Or_ABM): New.
- (CpuLM): Updated.
- (i386_cpu_flags): Add cpusse4_2_or_abm.
+ * i386-gen.c (process_copyright): Update for 2009.
- * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
- CpuABM|CpuSSE4_2 on popcnt.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
-2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.h: Update comments.
-
-2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
- * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
- * i386-opc.h: Likewise.
- * i386-opc.tbl: Likewise.
-
-2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/5534
- * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
- Byte, Word, Dword, QWord and Xmmword.
+ AVX Programming Reference (December, 2008)
+ * i386-dis.c (OP_VEX_FMA): Removed.
+ (OP_EX_VexW): Likewise.
+ (OP_EX_VexImmW): Likewise.
+ (OP_XMM_VexW): Likewise.
+ (VEXI4_Fixup): Likewise.
+ (VPERMIL2_Fixup): Likewise.
+ (VexI4): Likewise.
+ (VexFMA): Likewise.
+ (Vex128FMA): Likewise.
+ (EXVexW): Likewise.
+ (EXdVexW): Likewise.
+ (EXqVexW): Likewise.
+ (EXVexImmW): Likewise.
+ (XMVexW): Likewise.
+ (VPERMIL2): Likewise.
+ (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
+ (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
+ (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
+ (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
+ (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
+ (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
+ (get_vex_imm8): Likewise.
+ (OP_EX_VexReg): Likewise.
+ vpermil2_op): Likewise.
+ (EXVexWdq): New.
+ (vex_w_dq_mode): Likewise.
+ (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
+ (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
+ (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
+ (es_reg): Updated.
+ (PREFIX_VEX_38DB): Likewise.
+ (PREFIX_VEX_3A4A): Likewise.
+ (PREFIX_VEX_3A60): Likewise.
+ (PREFIX_VEX_3ADF): Likewise.
+ (VEX_LEN_3ADF_P_2): Likewise.
+ (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
+ PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
+ PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
+ PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
+ PREFIX_VEX_3896...PREFIX_VEX_389F,
+ PREFIX_VEX_38A6...PREFIX_VEX_38AF and
+ PREFIX_VEX_38B6...PREFIX_VEX_38BF.
+ (vex_table): Likewise.
+ (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
+ and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
+ (putop): Support "%XW".
+ (intel_operand_size): Handle vex_w_dq_mode.
- * i386-opc.h (No_xSuf): New.
- (CheckSize): Likewise.
- (Byte): Likewise.
- (Word): Likewise.
- (Dword): Likewise.
- (QWord): Likewise.
- (Xmmword): Likewise.
- (FWait): Updated.
- (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
- Dword, QWord and Xmmword.
+ * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
- * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
- used.
+ * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
+ instructions. Add new FMA instructions.
* i386-tbl.h: Regenerated.
-2008-01-02 Mark Kettenis <kettenis@gnu.org>
+2009-01-02 Matthias Klose <doko@ubuntu.com>
- * m88k-dis.c (instructions): Fix fcvt.* instructions.
- From Miod Vallat.
+ * or32-opc.c (or32_print_register, or32_print_immediate,
+ disassemble_insn): Don't rely on undefined sprintf behaviour.
-For older changes see ChangeLog-2007
+For older changes see ChangeLog-2008
\f
Local Variables:
mode: change-log
projects / deliverable / binutils-gdb.git / blobdiff