Fix snafu in aarch64 opcodes debugging statement.

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 2889f53420a921f74bb4b5c39cb29a9e8cd6a26a..df765e4ee72b8b94046e6c45fa570c4135f49fc6 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,85 @@
+2017-04-24  Tamar Christina  <tamar.christina@arm.com>
+
+       * aarch64-opc.c (aarch64_logical_immediate_p): Update DEBUG_TRACE
+       arguments.
+
+2017-04-22  Alexander Fedotov  <alfedotov@gmail.com>
+           Alan Modra  <amodra@gmail.com>
+
+       * ppc-opc.c (ELEV): Define.
+       (vle_opcodes): Add se_rfgi and e_sc.
+       (powerpc_opcodes): Enable lbdx, lhdx, lwdx, stbdx, sthdx, stwdx
+       for E200Z4.
+
+2017-04-21  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * sparc-opc.c (sparc_opcodes): Mark RETT instructions as v6notv9.
+
+2017-04-21  Nick Clifton  <nickc@redhat.com>
+
+       PR binutils/21380
+       * aarch64-tbl.h (aarch64_opcode_table): Fix masks for LD1R, LD2R,
+       LD3R and LD4R.
+
+2017-04-13  Alan Modra  <amodra@gmail.com>
+
+       * epiphany-desc.c: Regenerate.
+       * fr30-desc.c: Regenerate.
+       * frv-desc.c: Regenerate.
+       * ip2k-desc.c: Regenerate.
+       * iq2000-desc.c: Regenerate.
+       * lm32-desc.c: Regenerate.
+       * m32c-desc.c: Regenerate.
+       * m32r-desc.c: Regenerate.
+       * mep-desc.c: Regenerate.
+       * mt-desc.c: Regenerate.
+       * or1k-desc.c: Regenerate.
+       * xc16x-desc.c: Regenerate.
+       * xstormy16-desc.c: Regenerate.
+
+2017-04-11  Alan Modra  <amodra@gmail.com>
+
+       * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2,
+       PPC_OPCODE_VSX3, PPC_OPCODE_HTM and "htm".  Formatting.  Set
+       PPC_OPCODE_TMR for e6500.
+       * ppc-opc.c (PPCVEC2): Define as PPC_OPCODE_POWER8|PPC_OPCODE_E6500.
+       (PPCVEC3): Define as PPC_OPCODE_POWER9.
+       (PPCVSX2): Define as PPC_OPCODE_POWER8.
+       (PPCVSX3): Define as PPC_OPCODE_POWER9.
+       (PPCHTM): Define as PPC_OPCODE_POWER8.
+       (powerpc_opcodes <mftmr, mttmr>): Remove now unnecessary E6500.
+
+2017-04-10  Alan Modra  <amodra@gmail.com>
+
+       * ppc-dis.c (ppc_opts <476>): Remove PPC_OPCODE_440.
+       * ppc-opc.c (MULHW): Add PPC_OPCODE_476.
+       (powerpc_opcodes): Adjust PPC440, PPC464 and PPC476 insns to suit
+       removal of PPC_OPCODE_440 from ppc476 cpu selection bits.
+
+2017-04-09  Pip Cet  <pipcet@gmail.com>
+
+       * wasm32-dis.c (print_insn_wasm32): Avoid DECIMAL_DIG, specify
+       appropriate floating-point precision directly.
+
+2017-04-07  Alan Modra  <amodra@gmail.com>
+
+       * ppc-opc.c (powerpc_opcodes <mviwsplt, mvidsplt, lvexbx, lvepxl,
+       lvexhx, lvepx, lvexwx, stvexbx, stvexhx, stvexwx, lvtrx, lvtlx,
+       lvswx, stvfrx, stvflx, stvswx, lvsm, stvepxl, lvtrxl, stvepx,
+       lvtlxl, lvswxl, stvfrxl, stvflxl, stvswxl>): Enable E6500 only
+       vector instructions with E6500 not PPCVEC2.
+
+2017-04-06  Pip Cet  <pipcet@gmail.com>
+
+       * Makefile.am: Add wasm32-dis.c.
+       * configure.ac: Add wasm32-dis.c to wasm32 target.
+       * disassemble.c: Add wasm32 disassembler code.
+       * wasm32-dis.c: New file.
+       * Makefile.in: Regenerate.
+       * configure: Regenerate.
+       * po/POTFILES.in: Regenerate.
+       * po/opcodes.pot: Regenerate.
+
 2017-04-05  Pedro Alves  <palves@redhat.com>
 
        * arc-dis.c (parse_option, parse_disassembler_options): Constify.