+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
+ vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
+ * i386-tbl.h: Re-generate.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (set_bitfield): Ignore zero-length field names.
+ * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
+ cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
+ * i386-tbl.h: Re-generate.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (struct template_arg, struct template_instance,
+ struct template_param, struct template, templates,
+ parse_template, expand_templates): New.
+ (process_i386_opcodes): Various local variables moved to
+ expand_templates. Call parse_template and expand_templates.
+ * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
+ * i386-tbl.h: Re-generate.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
+ vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
+ register and memory source templates. Replace VexW= by VexW*
+ where applicable.
+ * i386-tbl.h: Re-generate.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
+ VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
+ * i386-tbl.h: Re-generate.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
+ * i386-tbl.h: Re-generate.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
+ (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
+ pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
+ VexW0 on SSE2AVX variants.
+ (vmovq): Drop NoRex64 from XMM/XMM variants.
+ (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
+ vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
+ applicable use VexW0.
+ * i386-tbl.h: Re-generate.
+
2020-03-06 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (opcode_modifiers): Remove Rex64 field.