+start-sanitize-sh3e
+Wed Aug 30 11:11:58 1995 Jim Wilson <wilson@chestnut.cygnus.com>
+
+ * sh-opc.h: Add blank lines to improve readabililty of sh3e
+ instructions.
+
+end-sanitize-sh3e
+Wed Aug 30 11:09:38 1995 Jim Wilson <wilson@chestnut.cygnus.com>
+
+ * sh-dis.c: Correct comment on first line of file.
+
+Tue Aug 29 15:37:18 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * disassemble.c (disassembler): Handle bfd_mach_sparc64.
+
+ * sparc-opc.c (asi, membar): New static locals.
+ (sparc_{encode,decode}_{asi,membar}): New functions.
+ (sparc_opcodes, membar insn): Fix.
+ * sparc-dis.c (print_insn): Call sparc_decode_asi.
+ Support decoding of membar masks.
+ (X_MEMBAR): Define.
+
+Sat Aug 26 21:22:48 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
+
+Mon Aug 21 17:33:36 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
+ and likewise for the other branches. Add bhs as an alias for bcc,
+ and likewise for the size variants. Add dbhs as an alias for
+ dbcc.
+
+start-sanitize-sh3e
+Fri Aug 11 13:40:24 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * sh-opc.h (FP sts instructions): Update to match reality.
+
+end-sanitize-sh3e
+Mon Aug 7 16:12:58 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-dis.c: (fpcr_names): Add % before all register names.
+ (reg_names): Likewise.
+ (print_insn_arg): Don't explicitly print % before register names.
+ Add % before register names in static array names. In case 'r',
+ print data registers as `@(Dn)', not `Dn@'. When printing a
+ memory address, don't print @# before it.
+ (print_indexed): Change base_disp and outer_disp from int to
+ bfd_vma. Print using MIT syntax, not mutant invalid Motorola
+ syntax. Sign extend 8 byte displacement correctly.
+ (print_base): Print using MIT syntax. Print zpc when appropriate.
+ Change parameter disp from int to bfd_vma.
+
+ * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
+ for jsr.
+
+start-sanitize-sh3e
+Mon Aug 7 02:21:40 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
+ F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
+ * sh-opc.h (sh_arg_type): Add new operand types.
+ (sh_table): Add new opcodes from SH3E Floating Point ISA.
+
+end-sanitize-sh3e
+Sat Aug 5 16:50:14 1995 Fred Fish <fnf@cygnus.com>
+
+ * Makefile.in (distclean): Remove generated file config.h.
+
+Sat Aug 5 16:50:14 1995 Fred Fish <fnf@cygnus.com>
+
+ * Makefile.in (distclean): Remove generated file config.h.
+
+Wed Aug 2 18:33:40 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
+ Clean up tables.
+ * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
+ (opcode): Remove.
+ (print_insn_m68k): Change d to be const. Use m68k_numopcodes
+ rather than numopcodes. Use m68k_opcodes rather than removed
+ opcode function. Don't check F_ALIAS.
+ (print_insn_arg): Change first parameter to be const char *.
+ * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
+ (m68k-opc.o): New target.
+ * configure.in: Build m68k-opc.o for bfd_m68k_arch.
+ * configure: Rebuild.
+
+Wed Aug 2 08:23:38 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
+ (opcode_bits, opcode_hash_table): New variables.
+ (opcodes_initialized): Renamed from opcodes_sorted.
+ (build_hash_table): New function.
+ (is_delayed_branch): Use hash table.
+ (print_insn): Renamed from print_insn_sparc, made static.
+ Build and use hash table. If !sparc64, ignore sparc64 insns,
+ and vice-versa if sparc64.
+ (print_insn_sparc, print_insn_sparc64): New functions.
+ (compare_opcodes): Move sparc64 opcodes to end.
+ Print commutative insns with constant second.
+ * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
+
+Tue Aug 1 00:12:49 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
+ print_address_func for A_BDISP12 and A_BDISP8. Correct test which
+ avoids printing a delay slot in a delay slot.
+ * sh-opc.h (sh_table): Fully bracket last entry.
+
+Mon Jul 31 12:04:47 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
+
+Wed Jul 12 00:59:34 1995 Ken Raeburn <raeburn@kr-pc.cygnus.com>
+
+ * configure.in: Get host_makefile_frag from ${srcdir}.
+
+ * configure.in: Autoconfiscated. Check for string[s].h. Create
+ config.h from config.in. Don't set up sysdep.h link.
+ * sysdep.h: New file.
+ * configure, config.in: New files, generated from configure.in.
+ * Makefile.in: Updated to be processed autoconf-style.
+ (distclean): Keep sysdep.h. Remove config.log and config.cache.
+ (Makefile): Depend on config.status.
+ (config.status): New rule.
+ * configure.bat: Update Makefile substitutions.
+
+Tue Jul 11 14:23:37 1995 Jeff Spiegel <jeffs@lsil.com>
+
+ * mips-opc.c (L1): Define.
+ (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
+ addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
+ and wb.
+
+Tue Jul 11 11:49:49 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
+ if ISA 3 and addu otherwise, replacing or, since some MIPS chips
+ have multiple add units but only a single logical unit.
+
+ * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
+ shifted by 18, without any insertion or extraction function.
+ (insert_cr, extract_cr): Remove.
+
+start-sanitize-arc
+Mon Jul 3 11:54:31 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.in (ALL_MACHINES): Add arc-dis.o and arc-opc.o.
+
+end-sanitize-arc
+Wed Jun 21 20:05:39 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
+ register names.
+
+Thu Jun 15 17:23:31 1995 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-config.in: Add sh and i386 configs, remove sparc config.
+ * sh-opc.h: Add copyright.
+
+Mon Jun 5 03:30:43 1995 Ken Raeburn <raeburn@kr-laptop.cygnus.com>
+
+ * Makefile.in (crunch-m68k): Delete extra target accidentally
+ checked in a while ago.
+
+Wed May 24 16:22:13 1995 Jim Wilson <wilson@chestnut.cygnus.com>
+
+ * sh-opc.h (sh_table): Add SH3 support.
+
+Wed May 24 14:16:08 1995 Steve Chamberlain <sac@slash.cygnus.com>
+
+ * sh-opc.h: Added bsrf and braf.
+
+Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk)
+
+ * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
+ bogus [ls]fm{ea,fd} patterns.
+
+ * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
+ * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
+ initialize it from memory. Make function static.
+ (print_insn_{big,little}_arm): New functions.
+ * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
+ the correct endianness.
+
+start-sanitize-arc
+Sat Apr 29 23:20:05 1995 Doug Evans <dje@chestnut.cygnus.com>
+
+ * arc-opc.c (arc_opcodes): Add ARC_OPCODE_CONDITIONAL_BRANCH flag.
+ (arc_suffixes): Use ARC_DELAY_{NONE,NORMAL,JUMP}.
+end-sanitize-arc
+
+Mon Apr 24 14:18:05 1995 Jason Molenda (crash@phydeaux.cygnus.com>
+
+ * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
+ enum list.
+
+Wed Apr 19 14:07:03 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
+ 17th, so that it builds again using GCC as the compiler.
+
+Tue Apr 18 12:14:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * mips-dis.c (print_insn_little_mips): Cast return value from
+ bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
+ expects an unsigned long, and that might be fewer words of
+ argument storage (e.g., if bfd_vma is long long on a 32-bit
+ machine).
+ (print_insn_big_mips): Likewise with bfd_getb32 value.
+ (_print_insn_mips): Now static.
+
+Mon Apr 17 12:23:28 1995 Kung Hsu <kung@rtl.cygnus.com>
+
+ * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
+ gcc memory hog problem with initializer is fixed.
+
+start-sanitize-arc
+Wed Apr 12 09:04:12 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc-opc.c (NULL): Define.
+ (arc_operands, insn fields u,s): Delete.
+ (arc_operands, insn fields a,b,c): Mark as signed.
+ (arc_opcodes): No longer const, links computed at run-time.
+ (arc_opcodes, mac/mul insns): Breakout suffixes as we don't handle
+ suffixes that affect the insn code.
+ (arc_opcodes): Resort table to macros are first.
+ (arc_opcodes, ld [b,c] entry): Add %Q to prevent shimms.
+ (arc_opcodes, st [b] entry): Likewise.
+ (arc_opcodes, st [b,d] entry): Fix mask, value.
+ (arc_reg_names): Add entries for r29, r30, r31, r60.
+ (opcode_map, icode_map): New static globals.
+ (arc_opcode_init_tables): Initialize them.
+ (arc_opcode_lookup_asm, arc_opcode_lookup_dis): New functions.
+ (insert_shimmoffset): Signal error if register present.
+ Validate constant.
+ * arc-dis.c (print_insn): Call arc_opcode_lookup_dis.
+end-sanitize-arc
+
+Mon Apr 10 15:55:01 1995 Stan Shebs <shebs@andros.cygnus.com>
+
+ Merge in support for Mac MPW as a host.
+ (Old change descriptions retained for informational value.)
+
+ * mpw-config.in (archname): Compute from the config.
+ (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
+
+ * mpw-config.in (target_arch): Compute from canonical target.
+ (m68k, mips, powerpc, sparc): Add architectures.
+ * mpw-make.in (disassemble.c.o): Add.
+ (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
+
+ * mpw-config.in (BFD_MACHINES): Set to a default value.
+ * mpw-make.in (BFD_MACHINES): Remove wired-in value.
+
+ * mpw-make.in (CSEARCH): Add extra-include to search path.
+
+ * mpw-config.in (varargs.h): Don't create.
+ (sysdep.h): Create using forward-include.
+ * mpw-make.in (CSEARCH): Add include/mpw to search path.
+
+ * mpw-config.in: New file, MPW version of configure.in.
+ * mpw-make.in: New file, MPW version of Makefile.in.
+
+start-sanitize-arc
+Thu Apr 6 20:36:08 1995 Doug Evans <dje@chestnut.cygnus.com>
+
+ * arc-dis.c (print_insn): New parameter `big_p'. Callers updated.
+ Call arc_get_opcode_mach to map bfd mach number to opcode value.
+ (print_insn_*): Pass bfd mach number, not opcode version.
+ * arc-opc.c (arc_get_opcode_mach): New function.
+end-sanitize-arc
+
+Fri Mar 31 14:23:38 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * alpha-dis.c (print_insn_alpha): Put empty statement after
+ default label.
+
+Tue Mar 21 10:51:40 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
+ (low_sign_extend): Likewise.
+ (get_field): Delete unused function.
+ (set_field, deposit_14, deposit_21): Likewise.
+
+Fri Mar 17 15:55:53 1995 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * i386-dis.c: Support for more pentium opcodes. From Guy Harris
+ (guy@netapp.com).
+
+Tue Mar 14 00:52:57 1995 Ken Raeburn (raeburn@kr-pc.cygnus.com)
+
+ Sat Feb 11 17:22:41 1995 Klaus Kaempf (kkaempf@didymus.rmi.de)
+
+ * alpha-opc.h (OSF_ASMCODE): define
+ print pal-code names as defined in App C of the
+ Alpha Architecture Reference Manual
+
+ * alpha-dis.c: cleaned up output
+ print stylized code forms as defined in App A.4.3 of the
+ Alpha Architecture Reference Manual
+
+Wed Mar 8 15:21:14 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
+ `rfe'.
+ * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
+ 'N', and 'M'.
+
+Wed Mar 8 02:54:05 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * m68k-dis.c (opcode): New function. Returns address of opcode
+ table entry given index, even if the opcode table was split to
+ work around gcc bugs.
+ (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
+ directly.
+ (BREAK_UP_BIG_DECL): Make secondary array static and const.
+ (reg_names): Now const.
+ (print_insn_arg): Arrays cacheFieldName and names now const.
+ (print_indexed): Array scales now const.
+
+start-sanitize-arc
+Tue Mar 7 21:14:14 1995 Doug Evans <dje@chestnut.cygnus.com>
+
+ * arc-dis.c (print_insn_arc_base): Split into big and little fns.
+ (print_insn_arc_{host,graphics,audio}): Likewise.
+ (print_insn): Add prototype.
+ (arc_get_disassembler): New arg `big_p'. Return little or big
+ print fn accordingly.
+ * arc-opc.c (arc_opcode_init_tables): Init arc_operand_map once.
+ (arc_opcode_supported): Use ARC_OPCODE_CPU to ignore byte order.
+ (arc_opval_supported): Likewise.
+ * disassemble.c (disassembler): Pass big endian flag to
+ arc_get_disassembler.
+end-sanitize-arc
+
+Tue Mar 7 16:41:21 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * ppc-opc.c: Sort recently added instructions by minor opcode
+ number within major opcode number.
+
+Mon Mar 6 10:04:36 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * hppa-dis.c: Include libhppa.h.
+
+Fri Feb 24 19:15:36 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips-opc.c: Change dli to use M_DLI, and add dla.
+
+Mon Feb 20 23:54:38 1995 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
+
+ * Makefile.in (ALL_MACHINES): Add w65-dis.o.
+
start-sanitize-arc
Fri Feb 17 12:42:25 1995 Doug Evans <dje@chestnut.cygnus.com>
projects / deliverable / binutils-gdb.git / blobdiff