+2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
+ 1.11, foreign, no-dist.
+ (MKDEP, m32c_opc_h): Remove variables.
+ (disassemble.lo): Rewrite using automake-style dependency
+ tracking rules; only list the dependency upon the primary source
+ file, but no included headers.
+ (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
+ (i386-gen.o, ia64-gen.o): Remove dependency statements.
+ (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
+ ensure all dependency fragments are included in the Makefile.
+ (s390-opc.lo): Depend on s390-opc.tab.
+ (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
+ (mkdep section): Remove.
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+ * Makefile.am (install-pdf, install-html): Remove.
+ * Makefile.in: Regenerate.
+
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Likewise.
+ * config.in: Likewise.
+ * configure: Likewise.
+
+2009-08-06 Michael Eager <eager@eagercon.com>
+
+ * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
+ CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
+ * Makefile.in: Regenerate.
+ * configure.in: Add bfd_microblaze_arch target.
+ * configure: Regenerate.
+ * disassemble.c: Define ARCH_microblaze, return
+ print_insn_microblaze().
+ * microblaze-dis.c: New MicroBlaze disassembler.
+ * microblaze-opc.h: New MicroBlaze opcode definitions.
+ * microblaze-opcm.h: New MicroBlaze opcode types.
+
+2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.in: Handle bfd_l1om_arch.
+ * disassemble.c (disassembler): Likewise.
+
+ * configure: Regenerated.
+
+ * i386-dis.c (print_insn): Handle bfd_mach_l1om and
+ bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
+
+ * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
+ Add CPU_L1OM_FLAGS.
+ (cpu_flags): Add CpuL1OM.
+ (set_bitfield): Take an argument to set the value field.
+ (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
+ (process_i386_opcode_modifier): Updated.
+ (process_i386_operand_type): Likewise.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
+
+ * i386-opc.h (CpuL1OM): New.
+ (CpuXsave): Updated.
+ (i386_cpu_flags): Add cpul1om.
+
+2009-07-24 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
+ frstpm.
+ * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
+ (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
+ (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
+ * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
+ Define.
+ (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
+ and cpufisttp.
+ * i386-opc.tbl: Qualify floating point instructions by their
+ respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
+ and fsincos to be avilable only on 387. Fix fstsw ax to be
+ available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
+ and frstpm.
+ * i386-init.h, i386-tbl.h: Regenerate.
+
+2009-07-20 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
+ offset or indexed based addressing mode 3.
+
+2009-07-14 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
+ patterns.
+ (arm_decode_shift): Catch illegal register based shifts.
+ (print_insn_arm): Properly handle negative register r0
+ post-indexed addressing.
+
+2009-07-10 Doug Kwan <dougkwan@google.com>
+
+ * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
+ lower 32 bits of long types to make hexadecimal output consistent
+ on both 32-bit and 64-bit hosts.
+
+2009-07-10 Alan Modra <amodra@bigpond.net.au>
+
+ * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
+ * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
+ * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
+ * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
+ * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
+ * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
+ * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
+ * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
+ * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
+ * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
+ * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
+ * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
+
+2009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
+
+ * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
+
2009-07-07 Nick Clifton <nickc@redhat.com>
PR 10288
projects / deliverable / binutils-gdb.git / blobdiff