PR binutils/15241

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index be40a2b0e897d703a069157ce2bf4d4519761d55..f311e1dedfdbbc26136d72ccd989d202f3e33d34 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,4 +1,62 @@
-2013-02-12  Maciej W. Rozycki  <macro@codesourcery.com>
+2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
+
+       * lm32-desc.c: Regenerate.
+
+2013-03-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-reg.tbl (riz): Add RegRex64.
+       * i386-tbl.h: Regenerated.
+
+2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64-tbl.h (QL_I3SAMEW, QL_I3WWX): New macros.
+       (aarch64_feature_crc): New static.
+       (CRC): New macro.
+       (aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w,
+       crc32x, crc32cb, crc32ch, crc32cw and crc32cx instructions.
+       * aarch64-asm-2.c: Re-generate.
+       * aarch64-dis-2.c: Ditto.
+       * aarch64-opc-2.c: Ditto.
+
+2013-02-27  Alan Modra  <amodra@gmail.com>
+
+       * rl78-decode.opc (rl78_decode_opcode): Fix typo.
+       * rl78-decode.c: Regenerate.
+
+2013-02-25  Kaushik Phatak  <Kaushik.Phatak@kpitcummins.com>
+
+       * rl78-decode.opc: Fix encoding of DIVWU insn.
+       * rl78-decode.c: Regenerate.
+
+2013-02-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/15159
+       * i386-dis.c (rm_table): Add clac and stac to RM_0F01_REG_1.
+
+       * i386-gen.c (cpu_flag_init): Add CPU_SMAP_FLAGS.
+       (cpu_flags): Add CpuSMAP.
+
+       * i386-opc.h (CpuSMAP): New.
+       (i386_cpu_flags): Add cpusmap.
+
+       * i386-opc.tbl: Add clac and stac.
+
+       * i386-init.h: Regenerated.
+       * i386-tbl.h: Likewise.
+
+2013-02-15  Markos Chandras  <markos.chandras@imgtec.com>
+
+       * metag-dis.c: Initialize outf->bytes_per_chunk to 4
+       which also makes the disassembler output be in little
+       endian like it should be.
+
+2013-02-14  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64-opc.c (aarch64_prfops): Change unnamed operation 'name'
+       fields to NULL.
+       (aarch64_print_operand): Adjust the printing for AARCH64_OPND_PRFOP.
+
+2013-02-13  Maciej W. Rozycki  <macro@codesourcery.com>
 
        * mips-dis.c (is_compressed_mode_p): Only match symbols from the
        section disassembled.