PR binutils/15241

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index fdb1ed618f3f35ad367580ee801cc0ec47ef25e9..f311e1dedfdbbc26136d72ccd989d202f3e33d34 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,28 @@
+2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
+
+       * lm32-desc.c: Regenerate.
+
+2013-03-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-reg.tbl (riz): Add RegRex64.
+       * i386-tbl.h: Regenerated.
+
+2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64-tbl.h (QL_I3SAMEW, QL_I3WWX): New macros.
+       (aarch64_feature_crc): New static.
+       (CRC): New macro.
+       (aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w,
+       crc32x, crc32cb, crc32ch, crc32cw and crc32cx instructions.
+       * aarch64-asm-2.c: Re-generate.
+       * aarch64-dis-2.c: Ditto.
+       * aarch64-opc-2.c: Ditto.
+
+2013-02-27  Alan Modra  <amodra@gmail.com>
+
+       * rl78-decode.opc (rl78_decode_opcode): Fix typo.
+       * rl78-decode.c: Regenerate.
+
 2013-02-25  Kaushik Phatak  <Kaushik.Phatak@kpitcummins.com>
 
        * rl78-decode.opc: Fix encoding of DIVWU insn.