x86: fold certain VCVT{,U}SI2S{S,D} templates

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9d02fc45e7c505e955af3b9aeb9e1e1400af17b9..f8715a369e94580c4613ee31bcdc2f4da960c82a 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,29 @@
+2020-02-17  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
+       Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
+       VexW1 instead of open-coding them.
+       * i386-tbl.h: Re-generate.
+
+2020-02-17  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (AddrPrefixOpReg): Define.
+       (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
+       umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
+       templates. Drop NoRex64.
+       * i386-tbl.h: Re-generate.
+
+2020-02-17  Jan Beulich  <jbeulich@suse.com>
+
+       PR gas/6518
+       * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
+       vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
+       into Intel syntax instance (with Unpsecified) and AT&T one
+       (without).
+       (vcvtneps2bf16): Likewise, along with folding the two so far
+       separate ones.
+       * i386-tbl.h: Re-generate.
+
 2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from