Updated French translation for the ld sub-directory and an update Spanish translation...

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index afcc477681dad284b8d79de5efa110b9f4748922..f95aa8642847acae6bb4547465d3046fa38d130d 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,58 @@
+2020-05-11  Nick Clifton  <nickc@redhat.com>
+
+       * po/fr.po: Updated French translation.
+
+2020-04-30  Alex Coplan  <alex.coplan@arm.com>
+
+       * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
+       * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
+       (operand_general_constraint_met_p): validate
+       AARCH64_OPND_UNDEFINED.
+       * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
+       for FLD_imm16_2.
+       * aarch64-asm-2.c: Regenerated.
+       * aarch64-dis-2.c: Regenerated.
+       * aarch64-opc-2.c: Regenerated.
+
+2020-04-29  Nick Clifton  <nickc@redhat.com>
+
+       PR 22699
+       * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
+       and SETRC insns.
+
+2020-04-29  Nick Clifton  <nickc@redhat.com>
+
+       * po/sv.po: Updated Swedish translation.
+
+2020-04-29  Nick Clifton  <nickc@redhat.com>
+
+       PR 22699
+       * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U.  Use
+       IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
+       * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
+       IMM0_8U case.
+
+2020-04-21  Andreas Schwab  <schwab@linux-m68k.org>
+
+       PR 25848
+       * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
+       cmpi only on m68020up and cpu32.
+
+2020-04-20  Sudakshina Das  <sudi.das@arm.com>
+
+       * aarch64-asm.c (aarch64_ins_none): New.
+       * aarch64-asm.h (ins_none): New declaration.
+       * aarch64-dis.c (aarch64_ext_none): New.
+       * aarch64-dis.h (ext_none): New declaration.
+       * aarch64-opc.c (aarch64_print_operand): Update case for
+       AARCH64_OPND_BARRIER_PSB.
+       * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
+       (AARCH64_OPERANDS): Update inserter/extracter for
+       AARCH64_OPND_BARRIER_PSB to use new dummy functions.
+       * aarch64-asm-2.c: Regenerated.
+       * aarch64-dis-2.c: Regenerated.
+       * aarch64-opc-2.c: Regenerated.
+
 2020-04-20  Sudakshina Das  <sudi.das@arm.com>
 
        * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.