S/390: Dump unknown instructions according to their length.

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index c636013a305de654241e180ded752d6f1079b673..fbde3e179b48a7f7d38d24d6a3b8a275f8fba502 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,92 @@
+2016-06-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+       * s390-dis.c (option_use_insn_len_bits_p): New file scope
+       variable.
+       (init_disasm): Handle new command line option "insnlength".
+       (print_s390_disassembler_options): Mention new option in help
+       output.
+       (print_insn_s390): Use the encoded insn length when dumping
+       unknown instructions.
+
+2016-06-03  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+       * avr-dis.c (avr_operand): Add default data address space origin (0x800000)
+        to the address and set as symbol address for LDS/ STS immediate operands.
+
+2016-06-07  Alan Modra  <amodra@gmail.com>
+
+       * ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
+       cpu for "vle" to e500.
+       * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
+       (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
+       (PPCNONE): Delete, substitute throughout.
+       (powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
+       except for major opcode 4 and 31.
+       (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
+
+2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
+       ARM_EXT_RAS in relevant entries.
+
+2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
+
+       PR binutils/20196
+       * ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
+       opcodes for E6500.
+
+2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutis/18386
+       * i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
+       (indir_v_mode): New.
+       Add comments for '&'.
+       (reg_table): Replace "{T|}" with "{&|}" on call and jmp.
+       (putop): Handle '&'.
+       (intel_operand_size): Handle indir_v_mode.
+       (OP_E_register): Likewise.
+       * i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64.  Add
+       64-bit indirect call/jmp for AMD64.
+       * i386-tbl.h: Regenerated
+
+2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * arc-dis.c (struct arc_operand_iterator): New structure.
+       (find_format_from_table): All the old content from find_format,
+       with some minor adjustments, and parameter renaming.
+       (find_format_long_instructions): New function.
+       (find_format): Rewritten.
+       (arc_insn_length): Add LSB parameter.
+       (extract_operand_value): New function.
+       (operand_iterator_next): New function.
+       (print_insn_arc): Use new functions to find opcode, and iterator
+       over operands.
+       * arc-opc.c (insert_nps_3bit_dst_short): New function.
+       (extract_nps_3bit_dst_short): New function.
+       (insert_nps_3bit_src2_short): New function.
+       (extract_nps_3bit_src2_short): New function.
+       (insert_nps_bitop1_size): New function.
+       (extract_nps_bitop1_size): New function.
+       (insert_nps_bitop2_size): New function.
+       (extract_nps_bitop2_size): New function.
+       (insert_nps_bitop_mod4_msb): New function.
+       (extract_nps_bitop_mod4_msb): New function.
+       (insert_nps_bitop_mod4_lsb): New function.
+       (extract_nps_bitop_mod4_lsb): New function.
+       (insert_nps_bitop_dst_pos3_pos4): New function.
+       (extract_nps_bitop_dst_pos3_pos4): New function.
+       (insert_nps_bitop_ins_ext): New function.
+       (extract_nps_bitop_ins_ext): New function.
+       (arc_operands): Add new operands.
+       (arc_long_opcodes): New global array.
+       (arc_num_long_opcodes): New global.
+       * arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.
+
+2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+       * nds32-asm.h: Add extern "C".
+       * sh-opc.h: Likewise.
+
 2016-06-01  Graham Markall  <graham.markall@embecosm.com>
 
        * arc-nps400-tbl.h: Add operands a,b,u6, 0,b,u6, and