x86/Intel: improve diagnostics for ambiguous VCVT* operands

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 1e0205678d81f3eedaab235c7a7023259c0f1997..fc666d52052b1dcce3f9d073c09f6cd28722ac82 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,87 @@
+2020-02-17  Jan Beulich  <jbeulich@suse.com>
+
+       PR gas/6518
+       * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
+       vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
+       into Intel syntax instance (with Unpsecified) and AT&T one
+       (without).
+       (vcvtneps2bf16): Likewise, along with folding the two so far
+       separate ones.
+       * i386-tbl.h: Re-generate.
+
+2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
+       CPU_ANY_SSE4A_FLAGS.
+
+2020-02-17  Alan Modra  <amodra@gmail.com>
+
+       * i386-gen.c (cpu_flag_init): Correct last change.
+
+2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS.  Remove
+       CPU_ANY_SSE4_FLAGS.
+
+2020-02-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.tbl (movsx): Remove Intel syntax comments.
+       (movzx): Likewise.
+
+2020-02-14  Jan Beulich  <jbeulich@suse.com>
+
+       PR gas/25438
+       * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
+       destination for Cpu64-only variant.
+       (movzx): Fold patterns.
+       * i386-tbl.h: Re-generate.
+
+2020-02-13  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
+       CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
+       CPU_ANY_SSE4_FLAGS entry.
+       * i386-init.h: Re-generate.
+
+2020-02-12  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
+       with Unspecified, making the present one AT&T syntax only.
+       * i386-tbl.h: Re-generate.
+
+2020-02-12  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
+       * i386-tbl.h: Re-generate.
+
+2020-02-12  Jan Beulich  <jbeulich@suse.com>
+
+       PR gas/24546
+       * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
+       * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
+       Amd64 and Intel64 templates.
+       (call, jmp): Likewise for far indirect variants. Dro
+       Unspecified.
+       * i386-tbl.h: Re-generate.
+
+2020-02-11  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
+       * i386-opc.h (ShortForm): Delete.
+       (struct i386_opcode_modifier): Remove shortform field.
+       * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
+       fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
+       fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
+       ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
+       Drop ShortForm.
+       * i386-tbl.h: Re-generate.
+
+2020-02-11  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
+       fucompi): Drop ShortForm from operand-less templates.
+       * i386-tbl.h: Re-generate.
+
 2020-02-11  Alan Modra  <amodra@gmail.com>
 
        * cgen-ibld.in (extract_normal): Set *valuep on all return paths.