[AArch64] Fix missing architecture checks for ARMv8.2 system registers.

[deliverable/binutils-gdb.git] / opcodes / Makefile.am

diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index 0f2fb9ddc3f1e7aa4fcf5beb5e2c39521416298a..e954cbe030c0b8f7ee29205d52be0196e68004b5 100644 (file)
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -1,17 +1,17 @@
 ## Process this file with automake to generate Makefile.in
 #
-#   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+#   Copyright (C) 2012-2016 Free Software Foundation, Inc.
 #
 # This file is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; either version 3 of the License, or
 # (at your option) any later version.
-# 
+#
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
-# 
+#
 # You should have received a copy of the GNU General Public License
 # along with this program; see the file COPYING3.  If not see
 # <http://www.gnu.org/licenses/>.
@@ -79,7 +79,6 @@ HFILES = \
        mep-desc.h mep-opc.h \
        microblaze-opc.h \
        mt-desc.h mt-opc.h \
-       openrisc-desc.h openrisc-opc.h \
        score-opc.h \
        sh-opc.h \
        sh64-opc.h \
@@ -136,6 +135,8 @@ TARGET_LIBOPCODES_CFILES = \
        frv-dis.c \
        frv-ibld.c \
        frv-opc.c \
+       ft32-dis.c \
+       ft32-opc.c \
        h8300-dis.c \
        h8500-dis.c \
        hppa-dis.c \
@@ -211,13 +212,11 @@ TARGET_LIBOPCODES_CFILES = \
        nios2-dis.c \
        nios2-opc.c \
        ns32k-dis.c \
-       openrisc-asm.c \
-       openrisc-desc.c \
-       openrisc-dis.c \
-       openrisc-ibld.c \
-       openrisc-opc.c \
-       or32-dis.c \
-       or32-opc.c \
+       or1k-asm.c \
+       or1k-desc.c \
+       or1k-dis.c \
+       or1k-ibld.c \
+       or1k-opc.c \
        pdp11-dis.c \
        pdp11-opc.c \
        pj-dis.c \
@@ -253,6 +252,8 @@ TARGET_LIBOPCODES_CFILES = \
        v850-dis.c \
        v850-opc.c \
        vax-dis.c \
+       visium-dis.c \
+       visium-opc.c \
        w65-dis.c \
        xc16x-asm.c \
        xc16x-desc.c \
@@ -297,9 +298,8 @@ ALL_MACHINES = $(TARGET_LIBOPCODES_CFILES:.c=.lo)
 
 OFILES = @BFD_MACHINES@
 
-# We should reconfigure whenever bfd/configure.in changes, because
-# that's where the version number in Makefile comes from.
-CONFIG_STATUS_DEPENDENCIES = $(BFDDIR)/configure.in
+# development.sh is used to determine -Werror default.
+CONFIG_STATUS_DEPENDENCIES = $(BFDDIR)/development.sh
 
 AM_CPPFLAGS = -I. -I$(srcdir) -I../bfd -I$(INCDIR) -I$(BFDDIR) @HDEFINES@ @INCINTL@
 
@@ -355,7 +355,7 @@ po/POTFILES.in: @MAINT@ Makefile
 CLEANFILES = \
        stamp-epiphany stamp-fr30 stamp-frv stamp-ip2k stamp-iq2000 stamp-lm32 \
        stamp-m32c stamp-m32r stamp-mep stamp-mt \
-       stamp-openrisc stamp-xc16x stamp-xstormy16 \
+       stamp-or1k stamp-xc16x stamp-xstormy16 \
        libopcodes.a stamp-lib
 
 
@@ -371,7 +371,7 @@ CGENDEPS = \
        $(CGENDIR)/opc-opinst.scm \
        cgen-asm.in cgen-dis.in cgen-ibld.in
 
-CGEN_CPUS = epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt openrisc xc16x xstormy16
+CGEN_CPUS = epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16
 
 if CGEN_MAINT
 EPIPHANY_DEPS = stamp-epiphany
@@ -384,7 +384,7 @@ M32C_DEPS = stamp-m32c
 M32R_DEPS = stamp-m32r
 MEP_DEPS = stamp-mep
 MT_DEPS = stamp-mt
-OPENRISC_DEPS = stamp-openrisc
+OR1K_DEPS = stamp-or1k
 XC16X_DEPS = stamp-xc16x
 XSTORMY16_DEPS = stamp-xstormy16
 else
@@ -392,15 +392,15 @@ EPIPHANY_DEPS =
 FR30_DEPS =
 FRV_DEPS =
 IP2K_DEPS =
-IQ2000_DEPS = 
-LM32_DEPS = 
+IQ2000_DEPS =
+LM32_DEPS =
 M32C_DEPS =
 M32R_DEPS =
 MEP_DEPS =
 MT_DEPS =
-OPENRISC_DEPS = 
-XC16X_DEPS = 
-XSTORMY16_DEPS = 
+OR1K_DEPS =
+XC16X_DEPS =
+XSTORMY16_DEPS =
 endif
 
 run-cgen:
@@ -492,11 +492,11 @@ stamp-mt: $(CGENDEPS) $(CPUDIR)/mt.cpu $(CPUDIR)/mt.opc
                archfile=$(CPUDIR)/mt.cpu \
                opcfile=$(CPUDIR)/mt.opc extrafiles=
 
-$(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(srcdir)/openrisc-opc.c $(srcdir)/openrisc-ibld.c $(srcdir)/openrisc-asm.c $(srcdir)/openrisc-dis.c: $(OPENRISC_DEPS)
+$(srcdir)/or1k-desc.h $(srcdir)/or1k-desc.c $(srcdir)/or1k-opc.h $(srcdir)/or1k-opc.c $(srcdir)/or1k-ibld.c $(srcdir)/or1k-opinst.c $(srcdir)/or1k-asm.c $(srcdir)/or1k-dis.c: $(OR1K_DEPS)
        @true
-stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc
-       $(MAKE) run-cgen arch=openrisc prefix=openrisc options= \
-               archfile=$(CPUDIR)/openrisc.cpu opcfile=$(CPUDIR)/openrisc.opc extrafiles=
+stamp-or1k: $(CGENDEPS) $(CPUDIR)/or1k.cpu $(CPUDIR)/or1k.opc $(CPUDIR)/or1kcommon.cpu $(CPUDIR)/or1korbis.cpu $(CPUDIR)/or1korfpx.cpu
+       $(MAKE) run-cgen arch=or1k prefix=or1k options=opinst \
+               archfile=$(CPUDIR)/or1k.cpu opcfile=$(CPUDIR)/or1k.opc extrafiles=opinst
 
 $(srcdir)/xc16x-desc.h $(srcdir)/xc16x-desc.c $(srcdir)/xc16x-opc.h $(srcdir)/xc16x-opc.c $(srcdir)/xc16x-ibld.c $(srcdir)/xc16x-asm.c $(srcdir)/xc16x-dis.c: $(XC16X_DEPS)
        @true
@@ -546,7 +546,7 @@ i386-gen.o: i386-gen.c i386-opc.h $(srcdir)/../include/opcode/i386.h \
        config.h i386-opc.h sysdep.h
        $(COMPILE_FOR_BUILD) -c $(srcdir)/i386-gen.c
 
-$(srcdir)/i386-tbl.h: $(srcdir)/i386-init.h 
+$(srcdir)/i386-tbl.h: $(srcdir)/i386-init.h
        @echo $@
 
 $(srcdir)/i386-init.h: @MAINT@ i386-gen$(EXEEXT_FOR_BUILD) i386-opc.tbl i386-reg.tbl