gdb/tui: Link source and assembler scrolling .... again

[deliverable/binutils-gdb.git] / opcodes / aarch64-asm-2.c

diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index ac5bda40f32f836c776a173e1ae52c663a55140f..1e78178df929285c4aeb1a8b66c883445cfeff87 100644 (file)
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -1,5 +1,5 @@
 /* This file is automatically generated by aarch64-gen.  Do not edit!  */
-/* Copyright (C) 2012-2019 Free Software Foundation, Inc.
+/* Copyright (C) 2012-2020 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
@@ -628,7 +628,6 @@ aarch64_insert_operand (const aarch64_operand *self,
     case 28:
     case 29:
     case 30:
-    case 162:
     case 163:
     case 164:
     case 165:
@@ -638,17 +637,18 @@ aarch64_insert_operand (const aarch64_operand *self,
     case 169:
     case 170:
     case 171:
-    case 184:
-    case 185:
-    case 186:
+    case 172:
     case 187:
     case 188:
     case 189:
     case 190:
     case 191:
     case 192:
-    case 197:
-    case 200:
+    case 193:
+    case 194:
+    case 195:
+    case 201:
+    case 204:
       return aarch64_ins_regno (self, info, code, inst, errors);
     case 14:
       return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -660,7 +660,7 @@ aarch64_insert_operand (const aarch64_operand *self,
     case 32:
     case 33:
     case 34:
-    case 203:
+    case 207:
       return aarch64_ins_reglane (self, info, code, inst, errors);
     case 35:
       return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -694,17 +694,17 @@ aarch64_insert_operand (const aarch64_operand *self,
     case 80:
     case 81:
     case 82:
-    case 159:
-    case 161:
-    case 176:
-    case 177:
-    case 178:
+    case 160:
+    case 162:
     case 179:
     case 180:
     case 181:
     case 182:
     case 183:
-    case 202:
+    case 184:
+    case 185:
+    case 186:
+    case 206:
       return aarch64_ins_imm (self, info, code, inst, errors);
     case 43:
     case 44:
@@ -714,10 +714,10 @@ aarch64_insert_operand (const aarch64_operand *self,
     case 47:
       return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
     case 51:
-    case 149:
+    case 150:
       return aarch64_ins_fpimm (self, info, code, inst, errors);
     case 68:
-    case 157:
+    case 158:
       return aarch64_ins_limm (self, info, code, inst, errors);
     case 69:
       return aarch64_ins_aimm (self, info, code, inst, errors);
@@ -727,11 +727,11 @@ aarch64_insert_operand (const aarch64_operand *self,
       return aarch64_ins_fbits (self, info, code, inst, errors);
     case 73:
     case 74:
-    case 154:
+    case 155:
       return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
     case 75:
-    case 153:
-    case 155:
+    case 154:
+    case 156:
       return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
     case 76:
     case 77:
@@ -774,22 +774,22 @@ aarch64_insert_operand (const aarch64_operand *self,
     case 106:
       return aarch64_ins_hint (self, info, code, inst, errors);
     case 107:
-      return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
     case 108:
+      return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
     case 109:
     case 110:
     case 111:
-      return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
     case 112:
-      return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
+      return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
     case 113:
-      return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
+      return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
     case 114:
+      return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
     case 115:
     case 116:
     case 117:
-      return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
     case 118:
+      return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
     case 119:
     case 120:
     case 121:
@@ -803,8 +803,8 @@ aarch64_insert_operand (const aarch64_operand *self,
     case 129:
     case 130:
     case 131:
-      return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
     case 132:
+      return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
     case 133:
     case 134:
     case 135:
@@ -812,49 +812,53 @@ aarch64_insert_operand (const aarch64_operand *self,
     case 137:
     case 138:
     case 139:
-      return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
     case 140:
+      return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
     case 141:
     case 142:
     case 143:
-      return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
     case 144:
-      return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
+      return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
     case 145:
-      return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
+      return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
     case 146:
-      return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+      return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
     case 147:
-      return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+      return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
     case 148:
+      return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+    case 149:
       return aarch64_ins_sve_asimm (self, info, code, inst, errors);
-    case 150:
-      return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
     case 151:
-      return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+      return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
     case 152:
+      return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+    case 153:
       return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
-    case 156:
+    case 157:
       return aarch64_ins_inv_limm (self, info, code, inst, errors);
-    case 158:
+    case 159:
       return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
-    case 160:
+    case 161:
       return aarch64_ins_sve_scale (self, info, code, inst, errors);
-    case 172:
     case 173:
-      return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
     case 174:
     case 175:
+      return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
+    case 176:
+    case 177:
+    case 178:
       return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
-    case 193:
-    case 194:
-    case 195:
     case 196:
-      return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+    case 197:
     case 198:
-      return aarch64_ins_sve_index (self, info, code, inst, errors);
     case 199:
-    case 201:
+    case 200:
+      return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+    case 202:
+      return aarch64_ins_sve_index (self, info, code, inst, errors);
+    case 203:
+    case 205:
       return aarch64_ins_sve_reglist (self, info, code, inst, errors);
     default: assert (0); abort ();
     }