/* This file is automatically generated by aarch64-gen. Do not edit! */
-/* Copyright (C) 2012-2015 Free Software Foundation, Inc.
+/* Copyright (C) 2012-2016 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of the GNU opcodes library.
case 1131: /* sys */
value = 1131; /* --> sys. */
break;
+ case 1881: /* bic */
+ case 1186: /* and */
+ value = 1186; /* --> and. */
+ break;
+ case 1169: /* mov */
+ case 1188: /* and */
+ value = 1188; /* --> and. */
+ break;
+ case 1173: /* movs */
+ case 1189: /* ands */
+ value = 1189; /* --> ands. */
+ break;
+ case 1882: /* cmple */
+ case 1224: /* cmpge */
+ value = 1224; /* --> cmpge. */
+ break;
+ case 1885: /* cmplt */
+ case 1227: /* cmpgt */
+ value = 1227; /* --> cmpgt. */
+ break;
+ case 1883: /* cmplo */
+ case 1229: /* cmphi */
+ value = 1229; /* --> cmphi. */
+ break;
+ case 1884: /* cmpls */
+ case 1232: /* cmphs */
+ value = 1232; /* --> cmphs. */
+ break;
+ case 1166: /* mov */
+ case 1254: /* cpy */
+ value = 1254; /* --> cpy. */
+ break;
+ case 1168: /* mov */
+ case 1255: /* cpy */
+ value = 1255; /* --> cpy. */
+ break;
+ case 1892: /* fmov */
+ case 1171: /* mov */
+ case 1256: /* cpy */
+ value = 1256; /* --> cpy. */
+ break;
+ case 1161: /* mov */
+ case 1268: /* dup */
+ value = 1268; /* --> dup. */
+ break;
+ case 1163: /* mov */
+ case 1160: /* mov */
+ case 1269: /* dup */
+ value = 1269; /* --> dup. */
+ break;
+ case 1891: /* fmov */
+ case 1165: /* mov */
+ case 1270: /* dup */
+ value = 1270; /* --> dup. */
+ break;
+ case 1164: /* mov */
+ case 1271: /* dupm */
+ value = 1271; /* --> dupm. */
+ break;
+ case 1886: /* eon */
+ case 1273: /* eor */
+ value = 1273; /* --> eor. */
+ break;
+ case 1174: /* not */
+ case 1275: /* eor */
+ value = 1275; /* --> eor. */
+ break;
+ case 1175: /* nots */
+ case 1276: /* eors */
+ value = 1276; /* --> eors. */
+ break;
+ case 1887: /* facle */
+ case 1281: /* facge */
+ value = 1281; /* --> facge. */
+ break;
+ case 1888: /* faclt */
+ case 1282: /* facgt */
+ value = 1282; /* --> facgt. */
+ break;
+ case 1889: /* fcmle */
+ case 1291: /* fcmge */
+ value = 1291; /* --> fcmge. */
+ break;
+ case 1890: /* fcmlt */
+ case 1293: /* fcmgt */
+ value = 1293; /* --> fcmgt. */
+ break;
+ case 1158: /* fmov */
+ case 1299: /* fcpy */
+ value = 1299; /* --> fcpy. */
+ break;
+ case 1157: /* fmov */
+ case 1316: /* fdup */
+ value = 1316; /* --> fdup. */
+ break;
+ case 1159: /* mov */
+ case 1614: /* orr */
+ value = 1614; /* --> orr. */
+ break;
+ case 1893: /* orn */
+ case 1615: /* orr */
+ value = 1615; /* --> orr. */
+ break;
+ case 1162: /* mov */
+ case 1617: /* orr */
+ value = 1617; /* --> orr. */
+ break;
+ case 1172: /* movs */
+ case 1618: /* orrs */
+ value = 1618; /* --> orrs. */
+ break;
+ case 1167: /* mov */
+ case 1674: /* sel */
+ value = 1674; /* --> sel. */
+ break;
+ case 1170: /* mov */
+ case 1675: /* sel */
+ value = 1675; /* --> sel. */
+ break;
default: return NULL;
}
case 27:
case 35:
case 36:
+ case 139:
+ case 140:
+ case 141:
+ case 142:
+ case 143:
+ case 144:
+ case 145:
+ case 146:
+ case 147:
+ case 148:
+ case 161:
+ case 162:
+ case 163:
+ case 164:
+ case 165:
+ case 166:
+ case 167:
+ case 168:
+ case 169:
+ case 170:
+ case 173:
return aarch64_ins_regno (self, info, code, inst);
case 12:
return aarch64_ins_reg_extended (self, info, code, inst);
case 34:
return aarch64_ins_ldst_elemlist (self, info, code, inst);
case 37:
- case 46:
case 47:
case 48:
case 49:
case 56:
case 57:
case 58:
- case 67:
+ case 59:
case 68:
case 69:
case 70:
+ case 71:
+ case 136:
+ case 138:
+ case 153:
+ case 154:
+ case 155:
+ case 156:
+ case 157:
+ case 158:
+ case 159:
+ case 160:
return aarch64_ins_imm (self, info, code, inst);
case 38:
case 39:
case 41:
case 42:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
- case 59:
- return aarch64_ins_limm (self, info, code, inst);
+ case 46:
+ case 129:
+ return aarch64_ins_fpimm (self, info, code, inst);
case 60:
- return aarch64_ins_aimm (self, info, code, inst);
+ case 134:
+ return aarch64_ins_limm (self, info, code, inst);
case 61:
- return aarch64_ins_imm_half (self, info, code, inst);
+ return aarch64_ins_aimm (self, info, code, inst);
case 62:
+ return aarch64_ins_imm_half (self, info, code, inst);
+ case 63:
return aarch64_ins_fbits (self, info, code, inst);
- case 64:
case 65:
+ case 66:
return aarch64_ins_cond (self, info, code, inst);
- case 71:
- case 77:
- return aarch64_ins_addr_simple (self, info, code, inst);
case 72:
- return aarch64_ins_addr_regoff (self, info, code, inst);
+ case 78:
+ return aarch64_ins_addr_simple (self, info, code, inst);
case 73:
+ return aarch64_ins_addr_regoff (self, info, code, inst);
case 74:
case 75:
- return aarch64_ins_addr_simm (self, info, code, inst);
case 76:
+ return aarch64_ins_addr_simm (self, info, code, inst);
+ case 77:
return aarch64_ins_addr_uimm12 (self, info, code, inst);
- case 78:
- return aarch64_ins_simd_addr_post (self, info, code, inst);
case 79:
- return aarch64_ins_sysreg (self, info, code, inst);
+ return aarch64_ins_simd_addr_post (self, info, code, inst);
case 80:
- return aarch64_ins_pstatefield (self, info, code, inst);
+ return aarch64_ins_sysreg (self, info, code, inst);
case 81:
+ return aarch64_ins_pstatefield (self, info, code, inst);
case 82:
case 83:
case 84:
- return aarch64_ins_sysins_op (self, info, code, inst);
case 85:
+ return aarch64_ins_sysins_op (self, info, code, inst);
case 86:
- return aarch64_ins_barrier (self, info, code, inst);
case 87:
- return aarch64_ins_prfop (self, info, code, inst);
+ return aarch64_ins_barrier (self, info, code, inst);
case 88:
+ return aarch64_ins_prfop (self, info, code, inst);
+ case 89:
return aarch64_ins_hint (self, info, code, inst);
+ case 90:
+ case 91:
+ case 92:
+ case 93:
+ return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst);
+ case 94:
+ return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst);
+ case 95:
+ return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst);
+ case 96:
+ case 97:
+ case 98:
+ case 99:
+ return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst);
+ case 100:
+ case 101:
+ case 102:
+ case 103:
+ case 104:
+ case 105:
+ case 106:
+ case 107:
+ case 108:
+ case 109:
+ case 110:
+ case 111:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst);
+ case 112:
+ case 113:
+ case 114:
+ case 115:
+ case 116:
+ case 117:
+ case 118:
+ case 119:
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst);
+ case 120:
+ case 121:
+ case 122:
+ case 123:
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst);
+ case 124:
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst);
+ case 125:
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst);
+ case 126:
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst);
+ case 127:
+ return aarch64_ins_sve_aimm (self, info, code, inst);
+ case 128:
+ return aarch64_ins_sve_asimm (self, info, code, inst);
+ case 130:
+ return aarch64_ins_sve_float_half_one (self, info, code, inst);
+ case 131:
+ return aarch64_ins_sve_float_half_two (self, info, code, inst);
+ case 132:
+ return aarch64_ins_sve_float_zero_one (self, info, code, inst);
+ case 133:
+ return aarch64_ins_inv_limm (self, info, code, inst);
+ case 135:
+ return aarch64_ins_sve_limm_mov (self, info, code, inst);
+ case 137:
+ return aarch64_ins_sve_scale (self, info, code, inst);
+ case 149:
+ case 150:
+ return aarch64_ins_sve_shlimm (self, info, code, inst);
+ case 151:
+ case 152:
+ return aarch64_ins_sve_shrimm (self, info, code, inst);
+ case 171:
+ return aarch64_ins_sve_index (self, info, code, inst);
+ case 172:
+ case 174:
+ return aarch64_ins_sve_reglist (self, info, code, inst);
default: assert (0); abort ();
}
}
projects / deliverable / binutils-gdb.git / blobdiff