Correct disassembly of dot product instructions.

[deliverable/binutils-gdb.git] / opcodes / aarch64-dis.c

diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index df67a066fdd8c6475b3920db5e222b183a31bfb6..aa38adb9020eb916515a1154aa5270db1f090830 100644 (file)
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -331,7 +331,7 @@ aarch64_ext_reglane (const aarch64_operand *self, aarch64_opnd_info *info,
       info->qualifier = get_expected_qualifier (inst, info->idx);
       switch (info->qualifier)
        {
-       case AARCH64_OPND_QLF_S_B:
+       case AARCH64_OPND_QLF_S_4B:
          /* L:H */
          info->reglane.index = extract_fields (code, 0, 2, FLD_H, FLD_L);
          info->reglane.regno &= 0x1f;
@@ -3097,6 +3097,10 @@ get_sym_code_type (struct disassemble_info *info, int n,
   unsigned int type;
   const char *name;
 
+  /* If the symbol is in a different section, ignore it.  */
+  if (info->section != NULL && info->section != info->symtab[n]->section)
+    return FALSE;
+
   es = *(elf_symbol_type **)(info->symtab + n);
   type = ELF_ST_TYPE (es->internal_elf_sym.st_info);
 
@@ -3171,9 +3175,7 @@ print_insn_aarch64 (bfd_vma pc,
          addr = bfd_asymbol_value (info->symtab[n]);
          if (addr > pc)
            break;
-         if ((info->section == NULL
-              || info->section == info->symtab[n]->section)
-             && get_sym_code_type (info, n, &type))
+         if (get_sym_code_type (info, n, &type))
            {
              last_sym = n;
              found = TRUE;