Implement Read/Write constraints on system registers on AArch64

[deliverable/binutils-gdb.git] / opcodes / aarch64-dis.c

diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 5994b2b655138885b053bf92b94ab2f52d04cf4e..b9c15594c01030edc0493c69c5bfcb00fc134507 100644 (file)
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -46,7 +46,8 @@ static bfd_vma last_mapping_addr = 0;
 
 /* Other options */
 static int no_aliases = 0;     /* If set disassemble as most general inst.  */
-\f
+\fstatic int no_notes = 1;      /* If set do not print disassemble notes in the
+                                 output as comments.  */
 
 static void
 set_default_aarch64_dis_options (struct disassemble_info *info ATTRIBUTE_UNUSED)
@@ -69,6 +70,18 @@ parse_aarch64_dis_option (const char *option, unsigned int len ATTRIBUTE_UNUSED)
       return;
     }
 
+  if (CONST_STRNEQ (option, "no-notes"))
+    {
+      no_notes = 1;
+      return;
+    }
+
+  if (CONST_STRNEQ (option, "notes"))
+    {
+      no_notes = 0;
+      return;
+    }
+
 #ifdef DEBUG_AARCH64
   if (CONST_STRNEQ (option, "debug_dump"))
     {
@@ -1166,7 +1179,22 @@ aarch64_ext_sysreg (const aarch64_operand *self ATTRIBUTE_UNUSED,
   /* op0:op1:CRn:CRm:op2 */
   info->sysreg.value = extract_fields (code, 0, 5, FLD_op0, FLD_op1, FLD_CRn,
                                       FLD_CRm, FLD_op2);
-  return 1;
+  info->sysreg.flags = 0;
+
+  /* If a system instruction, check which restrictions should be on the register
+     value during decoding, these will be enforced then.  */
+  if (inst->opcode->iclass == ic_system)
+    {
+      /* Check to see if it's read-only, else check if it's write only.
+        if it's both or unspecified don't care.  */
+      if ((inst->opcode->flags & (F_SYS_READ | F_SYS_WRITE)) == F_SYS_READ)
+       info->sysreg.flags = F_REG_READ;
+      else if ((inst->opcode->flags & (F_SYS_READ | F_SYS_WRITE))
+              == F_SYS_WRITE)
+       info->sysreg.flags = F_REG_WRITE;
+    }
+
+  return TRUE;
 }
 
 /* Decode the PSTATE field operand for e.g. MSR <pstatefield>, #<imm>.  */
@@ -2950,6 +2978,7 @@ print_operands (bfd_vma pc, const aarch64_opcode *opcode,
                const aarch64_opnd_info *opnds, struct disassemble_info *info)
 {
   int i, pcrel_p, num_printed;
+  char *notes = NULL;
   for (i = 0, num_printed = 0; i < AARCH64_MAX_OPND_NUM; ++i)
     {
       char str[128];
@@ -2964,7 +2993,7 @@ print_operands (bfd_vma pc, const aarch64_opcode *opcode,
 
       /* Generate the operand string in STR.  */
       aarch64_print_operand (str, sizeof (str), pc, opcode, opnds, i, &pcrel_p,
-                            &info->target);
+                            &info->target, &notes);
 
       /* Print the delimiter (taking account of omitted operand(s)).  */
       if (str[0] != '\0')
@@ -2977,6 +3006,9 @@ print_operands (bfd_vma pc, const aarch64_opcode *opcode,
       else
        (*info->fprintf_func) (info->stream, "%s", str);
     }
+
+    if (notes && !no_notes)
+      (*info->fprintf_func) (info->stream, "\t; note: %s", notes);
 }
 
 /* Set NAME to a copy of INST's mnemonic with the "." suffix removed.  */
@@ -3337,6 +3369,12 @@ with the -M switch (multiple options should be separated by commas):\n"));
   fprintf (stream, _("\n\
   aliases            Do print instruction aliases.\n"));
 
+  fprintf (stream, _("\n\
+  no-notes         Don't print instruction notes.\n"));
+
+  fprintf (stream, _("\n\
+  notes            Do print instruction notes.\n"));
+
 #ifdef DEBUG_AARCH64
   fprintf (stream, _("\n\
   debug_dump         Temp switch for debug trace.\n"));