Modify AArch64 Assembly and disassembly functions to be able to fail and report why.
[deliverable/binutils-gdb.git] / opcodes / aarch64-opc.c
index 96ca085d15b96b50bda6c2b62005e5d3ce39c1f4..c688b7c7745b8d7f9b6f74ee74ec3e9887a26364 100644 (file)
@@ -1,5 +1,5 @@
 /* aarch64-opc.c -- AArch64 opcode support.
-   Copyright (C) 2009-2017 Free Software Foundation, Inc.
+   Copyright (C) 2009-2018 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
@@ -698,7 +698,9 @@ struct operand_qualifier_data aarch64_opnd_qualifiers[] =
   {4, 1, 0x2, "s", OQK_OPD_VARIANT},
   {8, 1, 0x3, "d", OQK_OPD_VARIANT},
   {16, 1, 0x4, "q", OQK_OPD_VARIANT},
+  {1, 4, 0x0, "4b", OQK_OPD_VARIANT},
 
+  {1, 4, 0x0, "4b", OQK_OPD_VARIANT},
   {1, 8, 0x0, "8b", OQK_OPD_VARIANT},
   {1, 16, 0x1, "16b", OQK_OPD_VARIANT},
   {2, 2, 0x0, "2h", OQK_OPD_VARIANT},
@@ -1833,6 +1835,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
          max_value = 7;
          goto sve_imm_offset;
 
+       case AARCH64_OPND_SVE_ADDR_R:
        case AARCH64_OPND_SVE_ADDR_RR:
        case AARCH64_OPND_SVE_ADDR_RR_LSL1:
        case AARCH64_OPND_SVE_ADDR_RR_LSL2:
@@ -3474,6 +3477,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
       break;
 
     case AARCH64_OPND_ADDR_REGOFF:
+    case AARCH64_OPND_SVE_ADDR_R:
     case AARCH64_OPND_SVE_ADDR_RR:
     case AARCH64_OPND_SVE_ADDR_RR_LSL1:
     case AARCH64_OPND_SVE_ADDR_RR_LSL2:
@@ -3552,7 +3556,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
 
     case AARCH64_OPND_SYSREG:
       for (i = 0; aarch64_sys_regs[i].name; ++i)
-       if (aarch64_sys_regs[i].value == opnd->sysreg
+       if (aarch64_sys_regs[i].value == opnd->sysreg.value
            && ! aarch64_sys_reg_deprecated_p (&aarch64_sys_regs[i]))
          break;
       if (aarch64_sys_regs[i].name)
@@ -3560,7 +3564,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
       else
        {
          /* Implementation defined system register.  */
-         unsigned int value = opnd->sysreg;
+         unsigned int value = opnd->sysreg.value;
          snprintf (buf, size, "s%u_%u_c%u_c%u_%u", (value >> 14) & 0x3,
                    (value >> 11) & 0x7, (value >> 7) & 0xf, (value >> 3) & 0xf,
                    value & 0x7);
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