Fix a potential use of an uninitialised value in the ns32k disassembler.

[deliverable/binutils-gdb.git] / opcodes / aarch64-opc.h

diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 3d1765ba95bbe000b12a3041668859ad3ead8d25..a197df69d88c0de23fe48e7d35aa6709f58cf4ab 100644 (file)
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -1,5 +1,5 @@
 /* aarch64-opc.h -- Header file for aarch64-opc.c and aarch64-opc-2.c.
-   Copyright (C) 2012-2018 Free Software Foundation, Inc.
+   Copyright (C) 2012-2020 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
@@ -78,6 +78,7 @@ enum aarch64_field_kind
   FLD_imm12,
   FLD_imm14,
   FLD_imm16,
+  FLD_imm16_2,
   FLD_imm26,
   FLD_imms,
   FLD_immr,
@@ -121,6 +122,9 @@ enum aarch64_field_kind
   FLD_SVE_Zt,
   FLD_SVE_i1,
   FLD_SVE_i3h,
+  FLD_SVE_i3l,
+  FLD_SVE_i3h2,
+  FLD_SVE_i2h,
   FLD_SVE_imm3,
   FLD_SVE_imm4,
   FLD_SVE_imm5,
@@ -136,7 +140,10 @@ enum aarch64_field_kind
   FLD_SVE_prfop,
   FLD_SVE_rot1,
   FLD_SVE_rot2,
+  FLD_SVE_rot3,
   FLD_SVE_sz,
+  FLD_SVE_size,
+  FLD_SVE_sz2,
   FLD_SVE_tsz,
   FLD_SVE_tszh,
   FLD_SVE_tszl_8,
@@ -146,7 +153,8 @@ enum aarch64_field_kind
   FLD_rotate1,
   FLD_rotate2,
   FLD_rotate3,
-  FLD_SM3_imm2
+  FLD_SM3_imm2,
+  FLD_sz
 };
 
 /* Field description.  */
@@ -478,7 +486,7 @@ enum aarch64_modifier_kind
 aarch64_get_operand_modifier_from_value (aarch64_insn, bfd_boolean);
 
 
-bfd_boolean aarch64_wide_constant_p (int64_t, int, unsigned int *);
+bfd_boolean aarch64_wide_constant_p (uint64_t, int, unsigned int *);
 bfd_boolean aarch64_logical_immediate_p (uint64_t, int, aarch64_insn *);
 int aarch64_shrink_expanded_imm8 (uint64_t);