/* alpha-opc.c -- Alpha AXP opcode list
- Copyright (c) 1996, 1998, 1999 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
Contributed by Richard Henderson <rth@cygnus.com>,
patterned after the PPC opcode handling written by Ian Lance Taylor.
02111-1307, USA. */
#include <stdio.h>
-#include "ansidecl.h"
+#include "sysdep.h"
#include "opcode/alpha.h"
#include "bfd.h"
#include "opintl.h"
almost all of the extended instruction mnemonics. This permits the
disassembler to use them, and simplifies the assembler logic, at the
cost of increasing the table size. The table is strictly constant
- data, so the compiler should be able to put it in the .text section.
+ data, so the compiler should be able to put it in the text segment.
This file also holds the operand table. All knowledge about inserting
- operands into instructions and vice-versa is kept in this file.
+ and extracting operands from instructions is kept in this file.
The information for the base instruction set was compiled from the
_Alpha Architecture Handbook_, Digital Order Number EC-QD2KB-TE,
/* The fields are bits, shift, insert, extract, flags */
/* The zero index is used to indicate end-of-list */
#define UNUSED 0
- { 0, 0, 0, 0, 0 },
+ { 0, 0, 0, 0, 0, 0 },
/* The plain integer register fields */
#define RA (UNUSED + 1)
insert_ev6hwjhint, extract_ev6hwjhint }
};
-const int alpha_num_operands = sizeof(alpha_operands)/sizeof(*alpha_operands);
+const unsigned alpha_num_operands = sizeof(alpha_operands)/sizeof(*alpha_operands);
/* The RB field when it is the same as the RA field in the same insn.
This operand is marked fake. The insertion function just copies
static unsigned
insert_rba(insn, value, errmsg)
unsigned insn;
- int value;
- const char **errmsg;
+ int value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | (((insn >> 21) & 0x1f) << 16);
}
static unsigned
insert_rca(insn, value, errmsg)
unsigned insn;
- int value;
- const char **errmsg;
+ int value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | ((insn >> 21) & 0x1f);
}
static unsigned
insert_za(insn, value, errmsg)
unsigned insn;
- int value;
- const char **errmsg;
+ int value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | (31 << 21);
}
static unsigned
insert_zb(insn, value, errmsg)
unsigned insn;
- int value;
- const char **errmsg;
+ int value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | (31 << 16);
}
static unsigned
insert_zc(insn, value, errmsg)
unsigned insn;
- int value;
- const char **errmsg;
+ int value ATTRIBUTE_UNUSED;
+ const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | 31;
}
static int
extract_bdisp(insn, invalid)
unsigned insn;
- int *invalid;
+ int *invalid ATTRIBUTE_UNUSED;
{
return 4 * (((insn & 0x1FFFFF) ^ 0x100000) - 0x100000);
}
static int
extract_jhint(insn, invalid)
unsigned insn;
- int *invalid;
+ int *invalid ATTRIBUTE_UNUSED;
{
return 4 * (((insn & 0x3FFF) ^ 0x2000) - 0x2000);
}
static int
extract_ev6hwjhint(insn, invalid)
unsigned insn;
- int *invalid;
+ int *invalid ATTRIBUTE_UNUSED;
{
return 4 * (((insn & 0x1FFF) ^ 0x1000) - 0x1000);
}
{ "call_pal", PCD(0x00), BASE, ARG_PCD },
{ "pal", PCD(0x00), BASE, ARG_PCD }, /* alias */
+ { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
{ "lda", MEM(0x08), BASE, ARG_MEM },
+ { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
{ "ldah", MEM(0x09), BASE, ARG_MEM },
{ "ldbu", MEM(0x0A), BWX, ARG_MEM },
- { "unop", MEM(0x0B), BASE, { ZA } }, /* pseudo */
+ { "unop", MEM_(0x0B) | (30 << 16),
+ MEM_MASK, BASE, { ZA } }, /* pseudo */
{ "ldq_u", MEM(0x0B), BASE, ARG_MEM },
{ "ldwu", MEM(0x0C), BWX, ARG_MEM },
{ "stw", MEM(0x0D), BWX, ARG_MEM },
{ "excb", MFC(0x18,0x0400), BASE, ARG_NONE },
{ "mb", MFC(0x18,0x4000), BASE, ARG_NONE },
{ "wmb", MFC(0x18,0x4400), BASE, ARG_NONE },
- { "fetch", MFC(0x18,0x8000), BASE, { PRB } },
- { "fetch_m", MFC(0x18,0xA000), BASE, { PRB } },
+ { "fetch", MFC(0x18,0x8000), BASE, { ZA, PRB } },
+ { "fetch_m", MFC(0x18,0xA000), BASE, { ZA, PRB } },
{ "rpcc", MFC(0x18,0xC000), BASE, { RA } },
{ "rc", MFC(0x18,0xE000), BASE, { RA } },
- { "ecb", MFC(0x18,0xE800), BASE, { PRB } }, /* ev56 una */
+ { "ecb", MFC(0x18,0xE800), BASE, { ZA, PRB } }, /* ev56 una */
{ "rs", MFC(0x18,0xF000), BASE, { RA } },
- { "wh64", MFC(0x18,0xF800), BASE, { PRB } }, /* ev56 una */
+ { "wh64", MFC(0x18,0xF800), BASE, { ZA, PRB } }, /* ev56 una */
+ { "wh64en", MFC(0x18,0xFC00), BASE, { ZA, PRB } }, /* ev7 una */
{ "hw_mfpr", OPR(0x19,0x00), EV4, { RA, RBA, EV4EXTHWINDEX } },
{ "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },
{ "hw_mfpr/pai", OPR(0x19,0x07), EV4, ARG_EV4HWMPR },
{ "pal19", PCD(0x19), BASE, ARG_PCD },
+ { "jmp", MBR_(0x1A,0), MBR_MASK | 0x3FFF, /* pseudo */
+ BASE, { ZA, CPRB } },
{ "jmp", MBR(0x1A,0), BASE, { RA, CPRB, JMPHINT } },
{ "jsr", MBR(0x1A,1), BASE, { RA, CPRB, JMPHINT } },
+ { "ret", MBR_(0x1A,2) | (31 << 21) | (26 << 16) | 1,/* pseudo */
+ 0xFFFFFFFF, BASE, { 0 } },
{ "ret", MBR(0x1A,2), BASE, { RA, CPRB, RETHINT } },
{ "jcr", MBR(0x1A,3), BASE, { RA, CPRB, RETHINT } }, /* alias */
{ "jsr_coroutine", MBR(0x1A,3), BASE, { RA, CPRB, RETHINT } },
{ "bgt", BRA(0x3F), BASE, ARG_BRA },
};
-const int alpha_num_opcodes = sizeof(alpha_opcodes)/sizeof(*alpha_opcodes);
+const unsigned alpha_num_opcodes = sizeof(alpha_opcodes)/sizeof(*alpha_opcodes);
projects / deliverable / binutils-gdb.git / blobdiff