/* Opcode table for the ARC.
- Copyright (C) 1994-2017 Free Software Foundation, Inc.
+ Copyright (C) 1994-2019 Free Software Foundation, Inc.
Contributed by Claudiu Zissulescu (claziss@synopsys.com)
const char ** errmsg)
{
if (value == 0x1E)
- *errmsg = _("Register R30 is a limm indicator");
+ *errmsg = _("register R30 is a limm indicator");
+ else if (value < 0 || value > 31)
+ *errmsg = _("register out of range");
return insn |= ((value & 0x07) << 5) | ((value >> 3) & 0x03);
}
const char ** errmsg)
{
if (value != 0)
- *errmsg = _("Register must be R0");
+ *errmsg = _("register must be R0");
return insn;
}
const char ** errmsg)
{
if (value != 1)
- *errmsg = _("Register must be R1");
+ *errmsg = _("register must be R1");
return insn;
}
const char ** errmsg)
{
if (value != 2)
- *errmsg = _("Register must be R2");
+ *errmsg = _("register must be R2");
return insn;
}
const char ** errmsg)
{
if (value != 3)
- *errmsg = _("Register must be R3");
+ *errmsg = _("register must be R3");
return insn;
}
const char ** errmsg)
{
if (value != 28)
- *errmsg = _("Register must be SP");
+ *errmsg = _("register must be SP");
return insn;
}
const char ** errmsg)
{
if (value != 26)
- *errmsg = _("Register must be GP");
+ *errmsg = _("register must be GP");
return insn;
}
const char ** errmsg)
{
if (value != 63)
- *errmsg = _("Register must be PCL");
+ *errmsg = _("register must be PCL");
return insn;
}
const char ** errmsg)
{
if (value != 31)
- *errmsg = _("Register must be BLINK");
+ *errmsg = _("register must be BLINK");
return insn;
}
const char ** errmsg)
{
if (value != 29)
- *errmsg = _("Register must be ILINK1");
+ *errmsg = _("register must be ILINK1");
return insn;
}
const char ** errmsg)
{
if (value != 30)
- *errmsg = _("Register must be ILINK2");
+ *errmsg = _("register must be ILINK2");
return insn;
}
insn |= (value - 8);
break;
default:
- *errmsg = _("Register must be either r0-r3 or r12-r15");
+ *errmsg = _("register must be either r0-r3 or r12-r15");
break;
}
return insn;
insn |= ((value - 8)) << 8;
break;
default:
- *errmsg = _("Register must be either r0-r3 or r12-r15");
+ *errmsg = _("register must be either r0-r3 or r12-r15");
break;
}
return insn;
insn |= ((value - 8)) << 5;
break;
default:
- *errmsg = _("Register must be either r0-r3 or r12-r15");
+ *errmsg = _("register must be either r0-r3 or r12-r15");
break;
}
return insn;
tmp = 0x06;
break;
default:
- *errmsg = _("Accepted values are from -1 to 6");
+ *errmsg = _("accepted values are from -1 to 6");
break;
}
int reg2 = value & 0xFFFF;
if (reg1 != 13)
- *errmsg = _("First register of the range should be r13");
+ *errmsg = _("first register of the range should be r13");
else if (reg2 < 13 || reg2 > 26)
- *errmsg = _("Last register of the range doesn't fit");
+ *errmsg = _("last register of the range doesn't fit");
else
insn |= ((reg2 - 12) & 0x0F) << 1;
return insn;
{
if (value != 13)
{
- *errmsg = _("Invalid register number, should be fp");
+ *errmsg = _("invalid register number, should be fp");
return insn;
}
{
if (value != 27)
{
- *errmsg = _("Invalid register number, should be fp");
+ *errmsg = _("invalid register number, should be fp");
return insn;
}
{
if (value != 31)
{
- *errmsg = _("Invalid register number, should be blink");
+ *errmsg = _("invalid register number, should be blink");
return insn;
}
{
if (value != 63)
{
- *errmsg = _("Invalid register number, should be pcl");
+ *errmsg = _("invalid register number, should be pcl");
return insn;
}
extract_w6 (unsigned long long insn,
bfd_boolean * invalid ATTRIBUTE_UNUSED)
{
- unsigned value = 0;
+ int value = 0;
value |= ((insn >> 6) & 0x003f) << 0;
+ /* Extend the sign. */
+ int signbit = 1 << 5;
+ value = (value ^ signbit) - signbit;
+
return value;
}
insn |= (value - 8) << (OFFSET); \
break; \
default: \
- *errmsg = _("Register must be either r0-r3 or r12-r15"); \
+ *errmsg = _("register must be either r0-r3 or r12-r15"); \
break; \
} \
return insn; \
break;
default:
value = 0;
- *errmsg = _("Invalid size, should be 1, 2, 4, or 8");
+ *errmsg = _("invalid size, should be 1, 2, 4, or 8");
break;
}
value = value >> 4;
break;
default:
- *errmsg = _("Invalid position, should be 0, 16, 32, 48 or 64.");
+ *errmsg = _("invalid position, should be 0, 16, 32, 48 or 64.");
value = 0;
}
insn |= (value << 10);
value = 3;
break;
default:
- *errmsg = _("Invalid position, should be 16, 32, 64 or 128.");
+ *errmsg = _("invalid position, should be 16, 32, 64 or 128.");
value = 0;
}
insn |= (value << 2);
{
if ((value < 1) || (value > 64))
{
- *errmsg = _("Invalid size value must be on range 1-64.");
+ *errmsg = _("invalid size value must be on range 1-64.");
value = 0;
}
value = value & 0x3f;
value = value / 8; \
break; \
default: \
- *errmsg = _("Invalid position, should be 0, 8, 16, or 24"); \
+ *errmsg = _("invalid position, should be 0, 8, 16, or 24"); \
value = 0; \
} \
insn |= (value << SHIFT); \
{ \
if (value < LOWER || value > UPPER) \
{ \
- *errmsg = _("Invalid size, value must be " \
+ *errmsg = _("invalid size, value must be " \
#LOWER " to " #UPPER "."); \
return insn; \
} \
const char ** errmsg)
{
if (value < 0 || value > 28)
- *errmsg = _("Value must be in the range 0 to 28");
+ *errmsg = _("value must be in the range 0 to 28");
return insn | (value << 20);
}
const char ** errmsg) \
{ \
if (value < 1 || value > UPPER) \
- *errmsg = _("Value must be in the range 1 to " #UPPER); \
+ *errmsg = _("value must be in the range 1 to " #UPPER); \
if (value == UPPER) \
value = 0; \
return insn | (value << SHIFT); \
const char ** errmsg)
{
if (value < 0 || value > 240)
- *errmsg = _("Value must be in the range 0 to 240");
+ *errmsg = _("value must be in the range 0 to 240");
if ((value % 16) != 0)
- *errmsg = _("Value must be a multiple of 16");
+ *errmsg = _("value must be a multiple of 16");
value = value / 16;
return insn | (value << 6);
}
const char ** errmsg) \
{ \
if (value != ARC_NPS400_ADDRTYPE_##VALUE) \
- *errmsg = _("Invalid address type for operand"); \
+ *errmsg = _("invalid address type for operand"); \
return insn; \
} \
\
const char ** errmsg)
{
if (value < 0 || value > 31)
- *errmsg = _("Value must be in the range 0 to 31");
+ *errmsg = _("value must be in the range 0 to 31");
return insn | (value << 43) | (value << 48);
}
{
if (value & 0x3)
{
- *errmsg = _("Invalid position, should be 0,4, 8,...124.");
+ *errmsg = _("invalid position, should be one of: 0,4,8,...124.");
value = 0;
}
insn |= (value << 6);
#define RAD (RBdup + 1)
{ 6, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rad, 0 },
-#define RCD (RAD + 1)
+#define RAD_CHK (RAD + 1)
+ { 6, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rad, 0 },
+#define RCD (RAD_CHK + 1)
{ 6, 6, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rcd, 0 },
/* The plain integer register fields. Used by short
/* SIMM21_A16_5 mask = 00000111111111102222222222000000. */
#define SIMM21_A16_5 (UIMM6_8 + 1)
{21, 0, BFD_RELOC_ARC_S21H_PCREL, ARC_OPERAND_SIGNED
- | ARC_OPERAND_ALIGNED16 | ARC_OPERAND_TRUNCATE,
+ | ARC_OPERAND_ALIGNED16 | ARC_OPERAND_TRUNCATE | ARC_OPERAND_PCREL,
insert_simm21_a16_5, extract_simm21_a16_5},
/* SIMM25_A16_5 mask = 00000111111111102222222222003333. */