[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM_BF16

[deliverable/binutils-gdb.git] / opcodes / arm-dis.c

diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 0ed893b01acdabe33ddb24de10303cecf6be95e5..4a5609ae884ab47833e4854d529c38bbb7f57d26 100644 (file)
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2714,6 +2714,7 @@ static const struct opcode16 thumb_opcodes[] =
        %E              print the lsb and width fields of a bfc/bfi instruction
        %F              print the lsb and width fields of a sbfx/ubfx instruction
        %G              print a fallback offset for Branch Future instructions
+       %W              print an offset for BF instruction
        %b              print a conditional branch offset
        %B              print an unconditional branch offset
        %s              print the shift field of an SSAT instruction
@@ -5870,6 +5871,23 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
                }
                break;
 
+             case 'W':
+               {
+                 unsigned int immA = (given & 0x001f0000u) >> 16;
+                 unsigned int immB = (given & 0x000007feu) >> 1;
+                 unsigned int immC = (given & 0x00000800u) >> 11;
+                 bfd_vma offset = 0;
+
+                 offset |= immA << 12;
+                 offset |= immB << 2;
+                 offset |= immC << 1;
+                 /* Sign extend.  */
+                 offset = (offset & 0x10000) ? offset - (1 << 17) : offset;
+
+                 info->print_address_func (pc + 4 + offset, info);
+               }
+               break;
+
              case 'b':
                {
                  unsigned int S = (given & 0x04000000u) >> 26;