/* Instruction printing code for the ARM
- Copyright (C) 1994, 95, 96, 1997 Free Software Foundation, Inc.
+ Copyright (C) 1994, 95, 96, 97, 98, 1999 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
Modification by James G. Smith (jsmith@cygnus.co.uk)
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+#include "sysdep.h"
#include "dis-asm.h"
#define DEFINE_TABLE
#include "arm-opc.h"
+#include "coff/internal.h"
+#include "libcoff.h"
+#include "opintl.h"
+/* FIXME: This shouldn't be done here */
+#include "elf-bfd.h"
+#include "elf/internal.h"
+#include "elf/arm.h"
-static char *arm_conditional[] =
+static char * arm_conditional[] =
{"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
"hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
-static char *arm_regnames[] =
+static char * arm_regnames_raw[] =
{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc"};
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"};
-static char *arm_fp_const[] =
+static char * arm_regnames_standard[] =
+{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"};
+
+static char * arm_regnames_apcs[] =
+{"a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4",
+ "v5", "v6", "sl", "fp", "ip", "sp", "lr", "pc"};
+
+/* Choose which register name set to use. */
+static char ** arm_regnames = arm_regnames_standard;
+
+static char * arm_fp_const[] =
{"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
-static char *arm_shift[] =
+static char * arm_shift[] =
{"lsl", "lsr", "asr", "ror"};
-static int print_insn_arm PARAMS ((bfd_vma, struct disassemble_info *,
- long));
+static int print_insn_arm
+ PARAMS ((bfd_vma, struct disassemble_info *, long));
static void
arm_decode_shift (given, func, stream)
long given;
fprintf_ftype func;
- void *stream;
+ void * stream;
{
func (stream, "%s", arm_regnames[given & 0xf]);
+
if ((given & 0xff0) != 0)
{
if ((given & 0x10) == 0)
{
int amount = (given & 0xf80) >> 7;
int shift = (given & 0x60) >> 5;
+
if (amount == 0)
{
if (shift == 3)
func (stream, ", rrx");
return;
}
+
amount = 32;
}
+
func (stream, ", %s #%d", arm_shift[shift], amount);
}
else
static int
print_insn_arm (pc, info, given)
- bfd_vma pc;
- struct disassemble_info *info;
- long given;
+ bfd_vma pc;
+ struct disassemble_info * info;
+ long given;
{
- struct arm_opcode *insn;
- void *stream = info->stream;
- fprintf_ftype func = info->fprintf_func;
+ struct arm_opcode * insn;
+ void * stream = info->stream;
+ fprintf_ftype func = info->fprintf_func;
for (insn = arm_opcodes; insn->assembler; insn++)
{
if ((given & insn->mask) == insn->value)
{
- char *c;
+ char * c;
+
for (c = insn->assembler; *c; c++)
{
if (*c == '%')
&& ((given & 0x02000000) == 0))
{
int offset = given & 0xfff;
- if ((given & 0x00800000) == 0)
- offset = -offset;
- (*info->print_address_func)
- (offset + pc + 8, info);
+
+ func (stream, "[pc");
+
+ if (given & 0x01000000)
+ {
+ if ((given & 0x00800000) == 0)
+ offset = - offset;
+
+ /* pre-indexed */
+ func (stream, ", #%x]", offset);
+
+ offset += pc + 8;
+
+ /* Cope with the possibility of write-back being used.
+ Probably a very dangerous thing for the programmer
+ to do, but who are we to argue ? */
+ if (given & 0x00200000)
+ func (stream, "!");
+ }
+ else
+ {
+ /* post indexed */
+ func (stream, "], #%x", offset);
+
+ offset = pc + 8; /* ie ignore the offset */
+ }
+
+ func (stream, "\t; ");
+ info->print_address_func (offset, info);
}
else
{
{
/* PC relative with immediate offset */
int offset = ((given & 0xf00) >> 4) | (given & 0xf);
+
if ((given & 0x00800000) == 0)
offset = -offset;
+
+ func (stream, "[pc, #%x]\t; ", offset);
+
(*info->print_address_func)
(offset + pc + 8, info);
}
{
int rotate = (given & 0xf00) >> 7;
int immed = (given & 0xff);
- func (stream, "#%d",
- ((immed << (32 - rotate))
- | (immed >> rotate)) & 0xffffffff);
+ immed = (((immed << (32 - rotate))
+ | (immed >> rotate)) & 0xffffffff);
+ func (stream, "#%d\t; 0x%x", immed, immed);
}
else
arm_decode_shift (given, func, stream);
case 'C':
switch (given & 0x00090000)
{
- case 0:
+ default:
func (stream, "_???");
break;
+ case 0x90000:
+ func (stream, "_all");
+ break;
case 0x10000:
func (stream, "_ctl");
break;
func (stream, "e");
break;
default:
- func (stream, "<illegal precision>");
+ func (stream, _("<illegal precision>"));
break;
}
break;
reg = given >> bitstart;
reg &= (2 << (bitend - bitstart)) - 1;
func (stream, "0x%08x", reg);
+
+ /* Some SWI instructions have special meanings. */
+ if ((given & 0x0fffffff) == 0x0FF00000)
+ func (stream, "\t; IMB");
+ else if ((given & 0x0fffffff) == 0x0FF00001)
+ func (stream, "\t; IMBRange");
+ }
+ break;
+ case 'X':
+ {
+ long reg;
+ reg = given >> bitstart;
+ reg &= (2 << (bitend - bitstart)) - 1;
+ func (stream, "%01x", reg & 0xf);
}
break;
case 'f':
static int
print_insn_thumb (pc, info, given)
- bfd_vma pc;
- struct disassemble_info *info;
- long given;
+ bfd_vma pc;
+ struct disassemble_info * info;
+ long given;
{
- struct thumb_opcode *insn;
- void *stream = info->stream;
- fprintf_ftype func = info->fprintf_func;
+ struct thumb_opcode * insn;
+ void * stream = info->stream;
+ fprintf_ftype func = info->fprintf_func;
for (insn = thumb_opcodes; insn->assembler; insn++)
{
if ((given & insn->mask) == insn->value)
{
- char *c = insn->assembler;
+ char * c = insn->assembler;
/* Special processing for Thumb 2 instruction BL sequence: */
if (!*c) /* check for empty (not NULL) assembler string */
given &= 0xffff;
func (stream, "%04x\t", given);
+
for (; *c; c++)
{
if (*c == '%')
{
int domaskpc = 0;
int domasklr = 0;
+
switch (*++c)
{
case '%':
case 'D':
{
long reg;
+
reg = given & 0x7;
if (given & (1 << 7))
reg += 8;
{
int started = 0;
int reg;
+
func (stream, "{");
/* It would be nice if we could spot
ranges, and generate the rS-rE format: */
{
int bitstart = *c++ - '0';
int bitend = 0;
+
while (*c >= '0' && *c <= '9')
bitstart = (bitstart * 10) + *c++ - '0';
case '-':
{
long reg;
+
c++;
while (*c >= '0' && *c <= '9')
bitend = (bitend * 10) + *c++ - '0';
break;
case 'a':
- info->print_address_func (((pc + 4) & ~1) + (reg << 2), info);
+ /* PC-relative address -- the bottom two
+ bits of the address are dropped before
+ the calculation. */
+ info->print_address_func
+ (((pc + 4) & ~3) + (reg << 2), info);
break;
case 'x':
break;
default:
- abort();
+ abort ();
}
}
break;
break;
default:
- abort();
+ abort ();
}
}
break;
abort ();
}
+/* Select a different register name set.
+ Returns true if the name set selected is the APCS name set. */
+int
+arm_toggle_regnames ()
+{
+ if (arm_regnames == arm_regnames_standard)
+ arm_regnames = arm_regnames_apcs;
+ else
+ arm_regnames = arm_regnames_standard;
+
+ return arm_regnames == arm_regnames_apcs;
+}
+
+static void
+parse_disassembler_options (options)
+ char * options;
+{
+ if (options == NULL)
+ return;
+
+ if (strncmp (options, "reg-names-", 10) == 0)
+ {
+ options += 10;
+
+ if (strcmp (options, "std") == 0)
+ arm_regnames = arm_regnames_standard;
+ else if (strcmp (options, "apcs") == 0)
+ arm_regnames = arm_regnames_apcs;
+ else if (strcmp (options, "raw") == 0)
+ arm_regnames = arm_regnames_raw;
+ else
+ fprintf (stderr, "Unrecognised register name set: %s\n", options);
+ }
+ else
+ fprintf (stderr, "Unrecognised disassembler option: %s\n", options);
+
+ return;
+}
+
/* NOTE: There are no checks in these routines that the relevant number of data bytes exist */
int
print_insn_big_arm (pc, info)
bfd_vma pc;
- struct disassemble_info *info;
+ struct disassemble_info * info;
{
- unsigned char b[4];
- long given;
- int status;
+ unsigned char b[4];
+ long given;
+ int status;
+ coff_symbol_type * cs;
+ elf_symbol_type * es;
+ int is_thumb;
+
+ if (info->disassembler_options)
+ {
+ parse_disassembler_options (info->disassembler_options);
+
+ /* To avoid repeated parsing of this option, we remove it here. */
+ info->disassembler_options = NULL;
+ }
+
+ is_thumb = false;
+ if (info->symbols != NULL)
+ {
+ if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
+ {
+ cs = coffsymbol (*info->symbols);
+ is_thumb = ( cs->native->u.syment.n_sclass == C_THUMBEXT
+ || cs->native->u.syment.n_sclass == C_THUMBSTAT
+ || cs->native->u.syment.n_sclass == C_THUMBLABEL
+ || cs->native->u.syment.n_sclass == C_THUMBEXTFUNC
+ || cs->native->u.syment.n_sclass == C_THUMBSTATFUNC);
+ }
+ else if (bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour)
+ {
+ es = *(elf_symbol_type **)(info->symbols);
+ is_thumb = ELF_ST_TYPE (es->internal_elf_sym.st_info) ==
+ STT_ARM_TFUNC;
+ }
+ }
info->bytes_per_chunk = 4;
info->display_endian = BFD_ENDIAN_BIG;
return -1;
}
- if (info->flags & 0x1)
+ if (is_thumb)
{
if (pc & 0x2)
{
given |= (b[0] << 24) | (b[1] << 16);
}
else
- {
- given = (b[0] << 8) | b[1] | (b[2] << 24) | (b[3] << 16);
- }
+ given = (b[0] << 8) | b[1] | (b[2] << 24) | (b[3] << 16);
}
else
- {
- given = (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | (b[3]);
- }
+ given = (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | (b[3]);
- if (info->flags & 0x1)
- {
- status = print_insn_thumb (pc, info, given);
- info->flags |= 1; /* Stop displayed symbols from resetting the flag */
- }
+ if (is_thumb)
+ status = print_insn_thumb (pc, info, given);
else
- {
- status = print_insn_arm (pc, info, given);
- info->flags &= ~1; /* Stop displayed symbols from resetting the flag */
- }
+ status = print_insn_arm (pc, info, given);
return status;
}
int
print_insn_little_arm (pc, info)
bfd_vma pc;
- struct disassemble_info *info;
+ struct disassemble_info * info;
{
- unsigned char b[4];
- long given;
- int status;
-
+ unsigned char b[4];
+ long given;
+ int status;
+ coff_symbol_type * cs;
+ elf_symbol_type * es;
+ int is_thumb;
+
+ if (info->disassembler_options)
+ {
+ parse_disassembler_options (info->disassembler_options);
+
+ /* To avoid repeated parsing of this option, we remove it here. */
+ info->disassembler_options = NULL;
+ }
+
+ is_thumb = false;
+
+ if (info->symbols != NULL)
+ {
+ if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
+ {
+ cs = coffsymbol (*info->symbols);
+ is_thumb = ( cs->native->u.syment.n_sclass == C_THUMBEXT
+ || cs->native->u.syment.n_sclass == C_THUMBSTAT
+ || cs->native->u.syment.n_sclass == C_THUMBLABEL
+ || cs->native->u.syment.n_sclass == C_THUMBEXTFUNC
+ || cs->native->u.syment.n_sclass == C_THUMBSTATFUNC);
+ }
+ else if (bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour)
+ {
+ es = *(elf_symbol_type **)(info->symbols);
+ is_thumb = ELF_ST_TYPE (es->internal_elf_sym.st_info) ==
+ STT_ARM_TFUNC;
+ }
+ }
+
info->bytes_per_chunk = 4;
info->display_endian = BFD_ENDIAN_LITTLE;
status = (*info->read_memory_func) (pc, (bfd_byte *) &b[0], 4, info);
- if (status != 0 && (info->flags & 0x1))
+ if (status != 0 && is_thumb)
{
info->bytes_per_chunk = 2;
given = (b[0]) | (b[1] << 8) | (b[2] << 16) | (b[3] << 24);
- if (info->flags & 0x1)
- {
- status = print_insn_thumb (pc, info, given);
- info->flags |= 1; /* Stop displayed symbols from resetting the flag */
- }
+ if (is_thumb)
+ status = print_insn_thumb (pc, info, given);
else
- {
- status = print_insn_arm (pc, info, given);
- info->flags &= ~1; /* Stop displayed symbols from resetting the flag */
- }
+ status = print_insn_arm (pc, info, given);
return status;
}
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