/* Disassemble ADI Blackfin Instructions.
- Copyright (C) 2005-2014 Free Software Foundation, Inc.
+ Copyright (C) 2005-2019 Free Software Foundation, Inc.
This file is part of libopcodes.
typedef long TIword;
-#define HOST_LONG_WORD_SIZE (sizeof (long) * 8)
-#define XFIELD(w,p,s) (((w) & ((1 << (s)) - 1) << (p)) >> (p))
-#define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n)))
-#define MASKBITS(val, bits) (val & ((1 << bits) - 1))
+#define SIGNBIT(bits) (1ul << ((bits) - 1))
+#define MASKBITS(val, bits) ((val) & ((1ul << (bits)) - 1))
+#define SIGNEXTEND(v, n) ((MASKBITS (v, n) ^ SIGNBIT (n)) - SIGNBIT (n))
-#include "dis-asm.h"
+#include "disassemble.h"
typedef unsigned int bu32;
if (constant_formats[cf].reloc)
{
- bfd_vma ea = (((constant_formats[cf].pcrel ? SIGNEXTEND (x, constant_formats[cf].nbits)
- : x) + constant_formats[cf].offset) << constant_formats[cf].scale);
+ bfd_vma ea;
+
+ if (constant_formats[cf].pcrel)
+ x = SIGNEXTEND (x, constant_formats[cf].nbits);
+ ea = x + constant_formats[cf].offset;
+ ea = ea << constant_formats[cf].scale;
if (constant_formats[cf].pcrel)
ea += pc;
{
int nb = constant_formats[cf].nbits + 1;
- x = x | (1 << constant_formats[cf].nbits);
+ x = x | (1ul << constant_formats[cf].nbits);
x = SIGNEXTEND (x, nb);
}
- else
- x = constant_formats[cf].issigned ? SIGNEXTEND (x, constant_formats[cf].nbits) : x;
-
- if (constant_formats[cf].offset)
- x += constant_formats[cf].offset;
+ else if (constant_formats[cf].issigned)
+ x = SIGNEXTEND (x, constant_formats[cf].nbits);
- if (constant_formats[cf].scale)
- x <<= constant_formats[cf].scale;
+ x += constant_formats[cf].offset;
+ x = (unsigned long) x << constant_formats[cf].scale;
if (constant_formats[cf].decimal)
sprintf (buf, "%*li", constant_formats[cf].leading, x);
else
{
if (constant_formats[cf].issigned && x < 0)
- sprintf (buf, "-0x%x", abs (x));
+ sprintf (buf, "-0x%lx", (unsigned long)(- x));
else
sprintf (buf, "0x%lx", (unsigned long) x);
}
{
if (0 && constant_formats[cf].reloc)
{
- bu32 ea = (((constant_formats[cf].pcrel
- ? SIGNEXTEND (x, constant_formats[cf].nbits)
- : x) + constant_formats[cf].offset)
- << constant_formats[cf].scale);
+ bu32 ea;
+
+ if (constant_formats[cf].pcrel)
+ x = SIGNEXTEND (x, constant_formats[cf].nbits);
+ ea = x + constant_formats[cf].offset;
+ ea = ea << constant_formats[cf].scale;
if (constant_formats[cf].pcrel)
ea += pc;
if (constant_formats[cf].negative)
{
int nb = constant_formats[cf].nbits + 1;
- x = x | (1 << constant_formats[cf].nbits);
+ x = x | (1ul << constant_formats[cf].nbits);
x = SIGNEXTEND (x, nb);
}
else if (constant_formats[cf].issigned)
REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
};
-#define gregs(x, i) REGNAME (decode_gregs[((i) << 3) | (x)])
+#define gregs(x, i) REGNAME (decode_gregs[(((i) << 3) | (x)) & 15])
/* [dregs pregs (iregs mregs) (bregs lregs)]. */
static const enum machine_registers decode_regs[] =
REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
};
-#define regs(x, i) REGNAME (decode_regs[((i) << 3) | (x)])
+#define regs(x, i) REGNAME (decode_regs[(((i) << 3) | (x)) & 31])
/* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */
static const enum machine_registers decode_regs_lo[] =
REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3,
};
-#define regs_lo(x, i) REGNAME (decode_regs_lo[((i) << 3) | (x)])
+#define regs_lo(x, i) REGNAME (decode_regs_lo[(((i) << 3) | (x)) & 31])
/* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */
static const enum machine_registers decode_regs_hi[] =
REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3,
};
-#define regs_hi(x, i) REGNAME (decode_regs_hi[((i) << 3) | (x)])
+#define regs_hi(x, i) REGNAME (decode_regs_hi[(((i) << 3) | (x)) & 31])
static const enum machine_registers decode_statbits[] =
{
return -1;
priv->iw0 = iw0;
- if ((iw0 & 0xc000) == 0xc000)
+ if (((iw0 & 0xc000) == 0xc000) && ((iw0 & 0xff00) != 0xf800))
{
/* 32-bit insn. */
if (ifetch (pc + 2, outf, &iw1))