/* Instruction printing code for the DLX Microprocessor
- Copyright 2002 Free Software Foundation, Inc.
+ Copyright (C) 2002-2020 Free Software Foundation, Inc.
Contributed by Kuang Hwa Lin. Written by Kuang Hwa Lin, 03/2002.
- This program is free software; you can redistribute it and/or modify
+ This file is part of the GNU opcodes library.
+
+ This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/dlx.h"
#define R_ERROR 0x1
unsigned char opc, rs1, rs2, rd;
unsigned long imm26, imm16, func, current_insn_addr;
-static unsigned char dlx_get_opcode PARAMS ((unsigned long));
-static unsigned char dlx_get_rs1 PARAMS ((unsigned long));
-static unsigned char dlx_get_rs2 PARAMS ((unsigned long));
-static unsigned char dlx_get_rdR PARAMS ((unsigned long));
-static unsigned long dlx_get_func PARAMS ((unsigned long));
-static unsigned long dlx_get_imm16 PARAMS ((unsigned long));
-static unsigned long dlx_get_imm26 PARAMS ((unsigned long));
-static void operand_deliminator PARAMS ((struct disassemble_info *, char *));
-static unsigned char dlx_r_type PARAMS ((struct disassemble_info *));
-static unsigned char dlx_load_type PARAMS ((struct disassemble_info *));
-static unsigned char dlx_store_type PARAMS ((struct disassemble_info *));
-static unsigned char dlx_aluI_type PARAMS ((struct disassemble_info *));
-static unsigned char dlx_br_type PARAMS ((struct disassemble_info *));
-static unsigned char dlx_jmp_type PARAMS ((struct disassemble_info *));
-static unsigned char dlx_jr_type PARAMS ((struct disassemble_info *));
-
/* Print one instruction from MEMADDR on INFO->STREAM.
Return the size of the instruction (always 4 on dlx). */
static unsigned char
-dlx_get_opcode (opcode)
- unsigned long opcode;
+dlx_get_opcode (unsigned long opcode)
{
return (unsigned char) ((opcode >> 26) & 0x3F);
}
static unsigned char
-dlx_get_rs1 (opcode)
- unsigned long opcode;
+dlx_get_rs1 (unsigned long opcode)
{
return (unsigned char) ((opcode >> 21) & 0x1F);
}
static unsigned char
-dlx_get_rs2 (opcode)
- unsigned long opcode;
+dlx_get_rs2 (unsigned long opcode)
{
return (unsigned char) ((opcode >> 16) & 0x1F);
}
static unsigned char
-dlx_get_rdR (opcode)
- unsigned long opcode;
+dlx_get_rdR (unsigned long opcode)
{
return (unsigned char) ((opcode >> 11) & 0x1F);
}
static unsigned long
-dlx_get_func (opcode)
- unsigned long opcode;
+dlx_get_func (unsigned long opcode)
{
return (unsigned char) (opcode & 0x7FF);
}
static unsigned long
-dlx_get_imm16 (opcode)
- unsigned long opcode;
+dlx_get_imm16 (unsigned long opcode)
{
return (unsigned long) (opcode & 0xFFFF);
}
static unsigned long
-dlx_get_imm26 (opcode)
- unsigned long opcode;
+dlx_get_imm26 (unsigned long opcode)
{
return (unsigned long) (opcode & 0x03FFFFFF);
}
/* Fill the opcode to the max length. */
+
static void
-operand_deliminator (info, ptr)
- struct disassemble_info *info;
- char *ptr;
+operand_deliminator (struct disassemble_info *info, char *ptr)
{
int difft = 8 - (int) strlen (ptr);
}
/* Process the R-type opcode. */
+
static unsigned char
-dlx_r_type (info)
- struct disassemble_info *info;
+dlx_r_type (struct disassemble_info *info)
{
unsigned char r_opc[] = { OPC(ALUOP) }; /* Fix ME */
int r_opc_num = (sizeof r_opc) / (sizeof (char));
char *name;
}
dlx_r_opcode[] =
- {
+ {
{ NOPF, "nop" }, /* NOP */
{ ADDF, "add" }, /* Add */
{ ADDUF, "addu" }, /* Add Unsigned */
continue;
else
break;
- }
+ }
if (idx == r_opc_num)
return NIL;
/* Process the memory read opcode. */
static unsigned char
-dlx_load_type (info)
- struct disassemble_info* info;
+dlx_load_type (struct disassemble_info* info)
{
struct _load_opcode
{
char *name;
}
dlx_load_opcode[] =
- {
- { OPC(LHIOP), "lhi" }, /* Load HI to register. */
- { OPC(LBOP), "lb" }, /* load byte sign extended. */
- { OPC(LBUOP), "lbu" }, /* load byte unsigned. */
- { OPC(LSBUOP),"ldstbu"}, /* load store byte unsigned. */
- { OPC(LHOP), "lh" }, /* load halfword sign extended. */
- { OPC(LHUOP), "lhu" }, /* load halfword unsigned. */
- { OPC(LSHUOP),"ldsthu"}, /* load store halfword unsigned. */
- { OPC(LWOP), "lw" }, /* load word. */
- { OPC(LSWOP), "ldstw" } /* load store word. */
- };
+ {
+ { OPC(LHIOP), "lhi" }, /* Load HI to register. */
+ { OPC(LBOP), "lb" }, /* load byte sign extended. */
+ { OPC(LBUOP), "lbu" }, /* load byte unsigned. */
+ { OPC(LSBUOP),"ldstbu"}, /* load store byte unsigned. */
+ { OPC(LHOP), "lh" }, /* load halfword sign extended. */
+ { OPC(LHUOP), "lhu" }, /* load halfword unsigned. */
+ { OPC(LSHUOP),"ldsthu"}, /* load store halfword unsigned. */
+ { OPC(LWOP), "lw" }, /* load word. */
+ { OPC(LSWOP), "ldstw" } /* load store word. */
+ };
int dlx_load_opcode_num =
(sizeof dlx_load_opcode) / (sizeof dlx_load_opcode[0]);
int idx;
/* Process the memory store opcode. */
static unsigned char
-dlx_store_type (info)
- struct disassemble_info* info;
+dlx_store_type (struct disassemble_info* info)
{
struct _store_opcode
{
char *name;
}
dlx_store_opcode[] =
- {
- { OPC(SBOP), "sb" }, /* Store byte. */
- { OPC(SHOP), "sh" }, /* Store halfword. */
- { OPC(SWOP), "sw" }, /* Store word. */
- };
+ {
+ { OPC(SBOP), "sb" }, /* Store byte. */
+ { OPC(SHOP), "sh" }, /* Store halfword. */
+ { OPC(SWOP), "sw" }, /* Store word. */
+ };
int dlx_store_opcode_num =
(sizeof dlx_store_opcode) / (sizeof dlx_store_opcode[0]);
int idx;
/* Process the Arithmetic and Logical I-TYPE opcode. */
static unsigned char
-dlx_aluI_type (info)
- struct disassemble_info* info;
+dlx_aluI_type (struct disassemble_info* info)
{
struct _aluI_opcode
{
char *name;
}
dlx_aluI_opcode[] =
- {
- { OPC(ADDIOP), "addi" }, /* Store byte. */
- { OPC(ADDUIOP), "addui" }, /* Store halfword. */
- { OPC(SUBIOP), "subi" }, /* Store word. */
- { OPC(SUBUIOP), "subui" }, /* Store word. */
- { OPC(ANDIOP), "andi" }, /* Store word. */
- { OPC(ORIOP), "ori" }, /* Store word. */
- { OPC(XORIOP), "xori" }, /* Store word. */
- { OPC(SLLIOP), "slli" }, /* Store word. */
- { OPC(SRAIOP), "srai" }, /* Store word. */
- { OPC(SRLIOP), "srli" }, /* Store word. */
- { OPC(SEQIOP), "seqi" }, /* Store word. */
- { OPC(SNEIOP), "snei" }, /* Store word. */
- { OPC(SLTIOP), "slti" }, /* Store word. */
- { OPC(SGTIOP), "sgti" }, /* Store word. */
- { OPC(SLEIOP), "slei" }, /* Store word. */
- { OPC(SGEIOP), "sgei" }, /* Store word. */
- { OPC(SEQUIOP), "sequi" }, /* Store word. */
- { OPC(SNEUIOP), "sneui" }, /* Store word. */
- { OPC(SLTUIOP), "sltui" }, /* Store word. */
- { OPC(SGTUIOP), "sgtui" }, /* Store word. */
- { OPC(SLEUIOP), "sleui" }, /* Store word. */
- { OPC(SGEUIOP), "sgeui" }, /* Store word. */
-#if 0
- { OPC(MVTSOP), "mvts" }, /* Store word. */
- { OPC(MVFSOP), "mvfs" }, /* Store word. */
+ {
+ { OPC(ADDIOP), "addi" }, /* Store byte. */
+ { OPC(ADDUIOP), "addui" }, /* Store halfword. */
+ { OPC(SUBIOP), "subi" }, /* Store word. */
+ { OPC(SUBUIOP), "subui" }, /* Store word. */
+ { OPC(ANDIOP), "andi" }, /* Store word. */
+ { OPC(ORIOP), "ori" }, /* Store word. */
+ { OPC(XORIOP), "xori" }, /* Store word. */
+ { OPC(SLLIOP), "slli" }, /* Store word. */
+ { OPC(SRAIOP), "srai" }, /* Store word. */
+ { OPC(SRLIOP), "srli" }, /* Store word. */
+ { OPC(SEQIOP), "seqi" }, /* Store word. */
+ { OPC(SNEIOP), "snei" }, /* Store word. */
+ { OPC(SLTIOP), "slti" }, /* Store word. */
+ { OPC(SGTIOP), "sgti" }, /* Store word. */
+ { OPC(SLEIOP), "slei" }, /* Store word. */
+ { OPC(SGEIOP), "sgei" }, /* Store word. */
+ { OPC(SEQUIOP), "sequi" }, /* Store word. */
+ { OPC(SNEUIOP), "sneui" }, /* Store word. */
+ { OPC(SLTUIOP), "sltui" }, /* Store word. */
+ { OPC(SGTUIOP), "sgtui" }, /* Store word. */
+ { OPC(SLEUIOP), "sleui" }, /* Store word. */
+ { OPC(SGEUIOP), "sgeui" }, /* Store word. */
+#if 0
+ { OPC(MVTSOP), "mvts" }, /* Store word. */
+ { OPC(MVFSOP), "mvfs" }, /* Store word. */
#endif
- };
+ };
int dlx_aluI_opcode_num =
(sizeof dlx_aluI_opcode) / (sizeof dlx_aluI_opcode[0]);
int idx;
/* Process the branch instruction. */
static unsigned char
-dlx_br_type (info)
- struct disassemble_info* info;
+dlx_br_type (struct disassemble_info* info)
{
struct _br_opcode
{
char *name;
}
dlx_br_opcode[] =
- {
- { OPC(BEQOP), "beqz" }, /* Store byte. */
- { OPC(BNEOP), "bnez" } /* Store halfword. */
- };
+ {
+ { OPC(BEQOP), "beqz" }, /* Store byte. */
+ { OPC(BNEOP), "bnez" } /* Store halfword. */
+ };
int dlx_br_opcode_num =
(sizeof dlx_br_opcode) / (sizeof dlx_br_opcode[0]);
int idx;
imm16 += (current_insn_addr + 4);
(*info->fprintf_func) (info->stream, "%s", dlx_br_opcode[idx].name);
operand_deliminator (info, dlx_br_opcode[idx].name);
- (*info->fprintf_func) (info->stream, "r%d,", (int)rs1);
- (*info->fprintf_func) (info->stream, "0x%08x", (int)imm16);
+ (*info->fprintf_func) (info->stream, "r%d,", (int) rs1);
+ (*info->fprintf_func) (info->stream, "0x%08x", (int) imm16);
return (unsigned char) IBR_TYPE;
}
/* Process the jump instruction. */
static unsigned char
-dlx_jmp_type (info)
- struct disassemble_info* info;
+dlx_jmp_type (struct disassemble_info* info)
{
struct _jmp_opcode
{
char *name;
}
dlx_jmp_opcode[] =
- {
- { OPC(JOP), "j" }, /* Store byte. */
- { OPC(JALOP), "jal" }, /* Store halfword. */
- { OPC(BREAKOP), "break" }, /* Store halfword. */
- { OPC(TRAPOP), "trap" }, /* Store halfword. */
- { OPC(RFEOP), "rfe" } /* Store halfword. */
- };
+ {
+ { OPC(JOP), "j" }, /* Store byte. */
+ { OPC(JALOP), "jal" }, /* Store halfword. */
+ { OPC(BREAKOP), "break" }, /* Store halfword. */
+ { OPC(TRAPOP), "trap" }, /* Store halfword. */
+ { OPC(RFEOP), "rfe" } /* Store halfword. */
+ };
int dlx_jmp_opcode_num =
(sizeof dlx_jmp_opcode) / (sizeof dlx_jmp_opcode[0]);
int idx;
/* Process the jump register instruction. */
static unsigned char
-dlx_jr_type (info)
- struct disassemble_info* info;
+dlx_jr_type (struct disassemble_info* info)
{
struct _jr_opcode
{
unsigned long opcode;
char *name;
}
- dlx_jr_opcode[] = {
+ dlx_jr_opcode[] =
+ {
{ OPC(JROP), "jr" }, /* Store byte. */
{ OPC(JALROP), "jalr" } /* Store halfword. */
};
return (unsigned char) NIL;
}
-typedef unsigned char (* dlx_insn) PARAMS ((struct disassemble_info *));
+typedef unsigned char (* dlx_insn) (struct disassemble_info *);
/* This is the main DLX insn handling routine. */
int
-print_insn_dlx (memaddr, info)
- bfd_vma memaddr;
- struct disassemble_info* info;
+print_insn_dlx (bfd_vma memaddr, struct disassemble_info* info)
{
bfd_byte buffer[4];
int insn_idx;
unsigned long insn_word;
- unsigned char rtn_code;
- unsigned long dlx_insn_type[] =
- {
- (unsigned long) dlx_r_type,
- (unsigned long) dlx_load_type,
- (unsigned long) dlx_store_type,
- (unsigned long) dlx_aluI_type,
- (unsigned long) dlx_br_type,
- (unsigned long) dlx_jmp_type,
- (unsigned long) dlx_jr_type,
- (unsigned long) NULL
+ dlx_insn dlx_insn_type[] =
+ {
+ dlx_r_type,
+ dlx_load_type,
+ dlx_store_type,
+ dlx_aluI_type,
+ dlx_br_type,
+ dlx_jmp_type,
+ dlx_jr_type,
+ (dlx_insn) NULL
};
- int dlx_insn_type_num = ((sizeof dlx_insn_type) / (sizeof (unsigned long))) - 1;
+ int dlx_insn_type_num = ((sizeof dlx_insn_type) / (sizeof (dlx_insn))) - 1;
int status =
(*info->read_memory_func) (memaddr, (bfd_byte *) &buffer[0], 4, info);
#endif
/* Scan through all the insn type and print the insn out. */
- rtn_code = 0;
current_insn_addr = (unsigned long) memaddr;
for (insn_idx = 0; dlx_insn_type[insn_idx] != 0x0; insn_idx++)
- switch (((dlx_insn) (dlx_insn_type[insn_idx])) (info))
+ switch ((dlx_insn_type[insn_idx]) (info))
{
/* Found the correct opcode */
case R_TYPE:
projects / deliverable / binutils-gdb.git / blobdiff