cpu,opcodes: add instruction semantics to bpf.cpu and minor fixes

[deliverable/binutils-gdb.git] / opcodes / hppa-dis.c

diff --git a/opcodes/hppa-dis.c b/opcodes/hppa-dis.c
index 9844332f07a00ba7e294ab9715717d5420118fb1..93156da7cb029b3fff40288043040476f0e694cc 100644 (file)
--- a/opcodes/hppa-dis.c
+++ b/opcodes/hppa-dis.c
@@ -1,5 +1,5 @@
 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
-   Copyright (C) 1989-2019 Free Software Foundation, Inc.
+   Copyright (C) 1989-2020 Free Software Foundation, Inc.
 
    Contributed by the Center for Software Science at the
    University of Utah (pa-gdb-bugs@cs.utah.edu).
@@ -207,7 +207,7 @@ static void
 fput_const (unsigned num, disassemble_info *info)
 {
   if ((int) num < 0)
-    (*info->fprintf_func) (info->stream, "-%x", - (int) num);
+    (*info->fprintf_func) (info->stream, "-%x", -num);
   else
     (*info->fprintf_func) (info->stream, "%x", num);
 }