{ "OPERAND_TYPE_SHIFTCOUNT",
"ShiftCount" },
{ "OPERAND_TYPE_CONTROL",
- "Control" },
+ "Class=RegCR" },
{ "OPERAND_TYPE_TEST",
- "Test" },
+ "Class=RegTR" },
{ "OPERAND_TYPE_DEBUG",
- "Debug" },
+ "Class=RegDR" },
{ "OPERAND_TYPE_FLOATREG",
"Class=Reg|Tbyte" },
{ "OPERAND_TYPE_FLOATACC",
"Acc|Tbyte" },
{ "OPERAND_TYPE_SREG",
- "SReg" },
+ "Class=SReg" },
{ "OPERAND_TYPE_JUMPABSOLUTE",
"JumpAbsolute" },
{ "OPERAND_TYPE_REGMMX",
- "RegMMX" },
+ "Class=RegMMX" },
{ "OPERAND_TYPE_REGXMM",
- "RegSIMD|Xmmword" },
+ "Class=RegSIMD|Xmmword" },
{ "OPERAND_TYPE_REGYMM",
- "RegSIMD|Ymmword" },
+ "Class=RegSIMD|Ymmword" },
{ "OPERAND_TYPE_REGZMM",
- "RegSIMD|Zmmword" },
+ "Class=RegSIMD|Zmmword" },
{ "OPERAND_TYPE_REGMASK",
- "RegMask" },
+ "Class=RegMask" },
+ { "OPERAND_TYPE_REGBND",
+ "Class=RegBND" },
{ "OPERAND_TYPE_ESSEG",
"EsSeg" },
{ "OPERAND_TYPE_ACC8",
"Imm32|Imm32S|Imm64|Disp32|Disp64" },
{ "OPERAND_TYPE_ANYIMM",
"Imm1|Imm8|Imm8S|Imm16|Imm32|Imm32S|Imm64" },
- { "OPERAND_TYPE_REGBND",
- "RegBND" },
};
typedef struct bitfield
enum operand_class value;
} operand_classes[] = {
CLASS (Reg),
+ CLASS (SReg),
+ CLASS (RegCR),
+ CLASS (RegDR),
+ CLASS (RegTR),
+ CLASS (RegMMX),
+ CLASS (RegSIMD),
+ CLASS (RegMask),
+ CLASS (RegBND),
};
#undef CLASS
static bitfield operand_types[] =
{
- BITFIELD (RegMMX),
- BITFIELD (RegSIMD),
- BITFIELD (RegMask),
BITFIELD (Imm1),
BITFIELD (Imm8),
BITFIELD (Imm8S),
BITFIELD (Disp64),
BITFIELD (InOutPortReg),
BITFIELD (ShiftCount),
- BITFIELD (Control),
- BITFIELD (Debug),
- BITFIELD (Test),
- BITFIELD (SReg),
BITFIELD (Acc),
BITFIELD (JumpAbsolute),
BITFIELD (EsSeg),
BITFIELD (Zmmword),
BITFIELD (Unspecified),
BITFIELD (Anysize),
- BITFIELD (RegBND),
#ifdef OTUnused
BITFIELD (OTUnused),
#endif