-/* Copyright (C) 2007-2019 Free Software Foundation, Inc.
+/* Copyright (C) 2007-2020 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
{ "CPU_K8_FLAGS",
"CPU_ATHLON_FLAGS|CpuRdtscp|CPU_SSE2_FLAGS|CpuLM" },
{ "CPU_AMDFAM10_FLAGS",
- "CPU_K8_FLAGS|CpuFISTTP|CPU_SSE4A_FLAGS|CpuABM" },
+ "CPU_K8_FLAGS|CpuFISTTP|CPU_SSE4A_FLAGS|CpuLZCNT|CpuPOPCNT" },
{ "CPU_BDVER1_FLAGS",
- "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_XOP_FLAGS|CpuABM|CpuLWP|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_XOP_FLAGS|CpuLZCNT|CpuPOPCNT|CpuLWP|CpuSVME|CpuAES|CpuPCLMUL|CpuPRFCHW" },
{ "CPU_BDVER2_FLAGS",
"CPU_BDVER1_FLAGS|CpuFMA|CpuBMI|CpuTBM|CpuF16C" },
{ "CPU_BDVER3_FLAGS",
{ "CPU_BDVER4_FLAGS",
"CPU_BDVER3_FLAGS|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
{ "CPU_ZNVER1_FLAGS",
- "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuLZCNT|CpuPOPCNT|CpuSVME|CpuAES|CpuPCLMUL|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
{ "CPU_ZNVER2_FLAGS",
- "CPU_ZNVER1_FLAGS|CpuRDPID|CpuWBNOINVD|CpuCLWB" },
+ "CPU_ZNVER1_FLAGS|CpuCLWB|CpuRDPID|CpuRDPRU|CpuMCOMMIT|CpuWBNOINVD" },
{ "CPU_BTVER1_FLAGS",
- "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuABM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuLZCNT|CpuPOPCNT|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME" },
{ "CPU_BTVER2_FLAGS",
"CPU_BTVER1_FLAGS|CPU_AVX_FLAGS|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuMovbe|CpuXsaveopt|CpuPRFCHW" },
{ "CPU_8087_FLAGS",
{ "CPU_SSE4_1_FLAGS",
"CPU_SSSE3_FLAGS|CpuSSE4_1" },
{ "CPU_SSE4_2_FLAGS",
- "CPU_SSE4_1_FLAGS|CpuSSE4_2" },
+ "CPU_SSE4_1_FLAGS|CpuSSE4_2|CpuPOPCNT" },
{ "CPU_VMX_FLAGS",
"CpuVMX" },
{ "CPU_SMX_FLAGS",
"CpuBMI2" },
{ "CPU_LZCNT_FLAGS",
"CpuLZCNT" },
+ { "CPU_POPCNT_FLAGS",
+ "CpuPOPCNT" },
{ "CPU_HLE_FLAGS",
"CpuHLE" },
{ "CPU_RTM_FLAGS",
{ "CPU_SSE4A_FLAGS",
"CPU_SSE3_FLAGS|CpuSSE4a" },
{ "CPU_ABM_FLAGS",
- "CpuABM" },
+ "CpuLZCNT|CpuPOPCNT" },
{ "CPU_AVX_FLAGS",
"CPU_SSE4_2_FLAGS|CPU_XSAVE_FLAGS|CpuAVX" },
{ "CPU_AVX2_FLAGS",
"CpuENQCMD" },
{ "CPU_AVX512_VP2INTERSECT_FLAGS",
"CpuAVX512_VP2INTERSECT" },
+ { "CPU_RDPRU_FLAGS",
+ "CpuRDPRU" },
+ { "CPU_MCOMMIT_FLAGS",
+ "CpuMCOMMIT" },
+ { "CPU_SEV_ES_FLAGS",
+ "CpuSEV_ES" },
{ "CPU_ANY_X87_FLAGS",
"CPU_ANY_287_FLAGS|Cpu8087" },
{ "CPU_ANY_287_FLAGS",
{ "CPU_ANY_MMX_FLAGS",
"CPU_3DNOWA_FLAGS" },
{ "CPU_ANY_SSE_FLAGS",
- "CPU_ANY_SSE2_FLAGS|CpuSSE|CpuSSE4a" },
+ "CPU_ANY_SSE2_FLAGS|CpuSSE" },
{ "CPU_ANY_SSE2_FLAGS",
"CPU_ANY_SSE3_FLAGS|CpuSSE2" },
{ "CPU_ANY_SSE3_FLAGS",
- "CPU_ANY_SSSE3_FLAGS|CpuSSE3" },
+ "CPU_ANY_SSSE3_FLAGS|CpuSSE3|CpuSSE4a" },
{ "CPU_ANY_SSSE3_FLAGS",
"CPU_ANY_SSE4_1_FLAGS|CpuSSSE3" },
{ "CPU_ANY_SSE4_1_FLAGS",
"CPU_ANY_SSE4_2_FLAGS|CpuSSE4_1" },
{ "CPU_ANY_SSE4_2_FLAGS",
"CpuSSE4_2" },
+ { "CPU_ANY_SSE4A_FLAGS",
+ "CpuSSE4a" },
{ "CPU_ANY_AVX_FLAGS",
"CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" },
{ "CPU_ANY_AVX2_FLAGS",
"CpuAVX512_VP2INTERSECT" },
};
-static const initializer operand_type_shorthands[] =
-{
- { "Reg8", "Reg|Byte" },
- { "Reg16", "Reg|Word" },
- { "Reg32", "Reg|Dword" },
- { "Reg64", "Reg|Qword" },
- { "FloatAcc", "Acc|Tbyte" },
- { "FloatReg", "Reg|Tbyte" },
- { "RegXMM", "RegSIMD|Xmmword" },
- { "RegYMM", "RegSIMD|Ymmword" },
- { "RegZMM", "RegSIMD|Zmmword" },
-};
-
static initializer operand_type_init[] =
{
{ "OPERAND_TYPE_NONE",
"0" },
{ "OPERAND_TYPE_REG8",
- "Reg8" },
+ "Class=Reg|Byte" },
{ "OPERAND_TYPE_REG16",
- "Reg16" },
+ "Class=Reg|Word" },
{ "OPERAND_TYPE_REG32",
- "Reg32" },
+ "Class=Reg|Dword" },
{ "OPERAND_TYPE_REG64",
- "Reg64" },
+ "Class=Reg|Qword" },
{ "OPERAND_TYPE_IMM1",
"Imm1" },
{ "OPERAND_TYPE_IMM8",
{ "OPERAND_TYPE_DISP64",
"Disp64" },
{ "OPERAND_TYPE_INOUTPORTREG",
- "InOutPortReg" },
+ "Instance=RegD|Word" },
{ "OPERAND_TYPE_SHIFTCOUNT",
- "ShiftCount" },
+ "Instance=RegC|Byte" },
{ "OPERAND_TYPE_CONTROL",
- "Control" },
+ "Class=RegCR" },
{ "OPERAND_TYPE_TEST",
- "Test" },
+ "Class=RegTR" },
{ "OPERAND_TYPE_DEBUG",
- "Debug" },
+ "Class=RegDR" },
{ "OPERAND_TYPE_FLOATREG",
- "FloatReg" },
+ "Class=Reg|Tbyte" },
{ "OPERAND_TYPE_FLOATACC",
- "FloatAcc" },
+ "Instance=Accum|Tbyte" },
{ "OPERAND_TYPE_SREG",
- "SReg" },
- { "OPERAND_TYPE_JUMPABSOLUTE",
- "JumpAbsolute" },
+ "Class=SReg" },
{ "OPERAND_TYPE_REGMMX",
- "RegMMX" },
+ "Class=RegMMX" },
{ "OPERAND_TYPE_REGXMM",
- "RegXMM" },
+ "Class=RegSIMD|Xmmword" },
{ "OPERAND_TYPE_REGYMM",
- "RegYMM" },
+ "Class=RegSIMD|Ymmword" },
{ "OPERAND_TYPE_REGZMM",
- "RegZMM" },
+ "Class=RegSIMD|Zmmword" },
{ "OPERAND_TYPE_REGMASK",
- "RegMask" },
- { "OPERAND_TYPE_ESSEG",
- "EsSeg" },
+ "Class=RegMask" },
+ { "OPERAND_TYPE_REGBND",
+ "Class=RegBND" },
{ "OPERAND_TYPE_ACC8",
- "Acc|Byte" },
+ "Instance=Accum|Byte" },
{ "OPERAND_TYPE_ACC16",
- "Acc|Word" },
+ "Instance=Accum|Word" },
{ "OPERAND_TYPE_ACC32",
- "Acc|Dword" },
+ "Instance=Accum|Dword" },
{ "OPERAND_TYPE_ACC64",
- "Acc|Qword" },
+ "Instance=Accum|Qword" },
{ "OPERAND_TYPE_DISP16_32",
"Disp16|Disp32" },
{ "OPERAND_TYPE_ANYDISP",
"Imm32|Imm32S|Imm64|Disp32" },
{ "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
"Imm32|Imm32S|Imm64|Disp32|Disp64" },
- { "OPERAND_TYPE_REGBND",
- "RegBND" },
+ { "OPERAND_TYPE_ANYIMM",
+ "Imm1|Imm8|Imm8S|Imm16|Imm32|Imm32S|Imm64" },
};
typedef struct bitfield
BITFIELD (CpuSVME),
BITFIELD (CpuVMX),
BITFIELD (CpuSMX),
- BITFIELD (CpuABM),
BITFIELD (CpuXsave),
BITFIELD (CpuXsaveopt),
BITFIELD (CpuAES),
BITFIELD (CpuF16C),
BITFIELD (CpuBMI2),
BITFIELD (CpuLZCNT),
+ BITFIELD (CpuPOPCNT),
BITFIELD (CpuHLE),
BITFIELD (CpuRTM),
BITFIELD (CpuINVPCID),
BITFIELD (CpuMOVDIRI),
BITFIELD (CpuMOVDIR64B),
BITFIELD (CpuENQCMD),
+ BITFIELD (CpuRDPRU),
+ BITFIELD (CpuMCOMMIT),
+ BITFIELD (CpuSEV_ES),
#ifdef CpuUnused
BITFIELD (CpuUnused),
#endif
BITFIELD (W),
BITFIELD (Load),
BITFIELD (Modrm),
- BITFIELD (ShortForm),
BITFIELD (Jump),
- BITFIELD (JumpDword),
- BITFIELD (JumpByte),
- BITFIELD (JumpInterSegment),
BITFIELD (FloatMF),
BITFIELD (FloatR),
BITFIELD (Size),
BITFIELD (CheckRegSize),
- BITFIELD (IgnoreSize),
- BITFIELD (DefaultSize),
+ BITFIELD (MnemonicSize),
+ BITFIELD (Anysize),
BITFIELD (No_bSuf),
BITFIELD (No_wSuf),
BITFIELD (No_lSuf),
BITFIELD (IsPrefix),
BITFIELD (ImmExt),
BITFIELD (NoRex64),
- BITFIELD (Rex64),
BITFIELD (Ugh),
BITFIELD (Vex),
BITFIELD (VexVVVV),
BITFIELD (ATTMnemonic),
BITFIELD (ATTSyntax),
BITFIELD (IntelSyntax),
- BITFIELD (AMD64),
- BITFIELD (Intel64),
+ BITFIELD (ISA64),
+};
+
+#define CLASS(n) #n, n
+
+static const struct {
+ const char *name;
+ enum operand_class value;
+} operand_classes[] = {
+ CLASS (Reg),
+ CLASS (SReg),
+ CLASS (RegCR),
+ CLASS (RegDR),
+ CLASS (RegTR),
+ CLASS (RegMMX),
+ CLASS (RegSIMD),
+ CLASS (RegMask),
+ CLASS (RegBND),
};
+#undef CLASS
+
+#define INSTANCE(n) #n, n
+
+static const struct {
+ const char *name;
+ enum operand_instance value;
+} operand_instances[] = {
+ INSTANCE (Accum),
+ INSTANCE (RegC),
+ INSTANCE (RegD),
+ INSTANCE (RegB),
+};
+
+#undef INSTANCE
+
static bitfield operand_types[] =
{
- BITFIELD (Reg),
- BITFIELD (RegMMX),
- BITFIELD (RegSIMD),
- BITFIELD (RegMask),
BITFIELD (Imm1),
BITFIELD (Imm8),
BITFIELD (Imm8S),
BITFIELD (Disp32),
BITFIELD (Disp32S),
BITFIELD (Disp64),
- BITFIELD (InOutPortReg),
- BITFIELD (ShiftCount),
- BITFIELD (Control),
- BITFIELD (Debug),
- BITFIELD (Test),
- BITFIELD (SReg),
- BITFIELD (Acc),
- BITFIELD (JumpAbsolute),
- BITFIELD (EsSeg),
BITFIELD (Byte),
BITFIELD (Word),
BITFIELD (Dword),
BITFIELD (Ymmword),
BITFIELD (Zmmword),
BITFIELD (Unspecified),
- BITFIELD (Anysize),
- BITFIELD (RegBND),
#ifdef OTUnused
BITFIELD (OTUnused),
#endif
process_copyright (FILE *fp)
{
fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\
-/* Copyright (C) 2007-2019 Free Software Foundation, Inc.\n\
+/* Copyright (C) 2007-2020 Free Software Foundation, Inc.\n\
\n\
This file is part of the GNU opcodes library.\n\
\n\
static void set_bitfield (char *, bitfield *, int, unsigned int, int);
static int
-set_bitfield_from_shorthand (char *f, bitfield *array, unsigned int size,
- int lineno)
+set_bitfield_from_cpu_flag_init (char *f, bitfield *array, unsigned int size,
+ int lineno)
{
char *str, *next, *last;
unsigned int i;
return 0;
}
- for (i = 0; i < ARRAY_SIZE (operand_type_shorthands); i++)
- if (strcmp (operand_type_shorthands[i].name, f) == 0)
- {
- /* Turn on selective bits. */
- char *init = xstrdup (operand_type_shorthands[i].init);
- last = init + strlen (init);
- for (next = init; next && next < last; )
- {
- str = next_field (next, '|', &next, last);
- if (str)
- set_bitfield (str, array, 1, size, lineno);
- }
- free (init);
- return 0;
- }
-
return -1;
}
}
}
- /* Handle shorthands. */
- if (value == 1 && !set_bitfield_from_shorthand (f, array, size, lineno))
+ /* Handle CPU_XXX_FLAGS. */
+ if (value == 1 && !set_bitfield_from_cpu_flag_init (f, array, size, lineno))
return;
if (lineno != -1)
};
static void
-output_operand_type (FILE *table, bitfield *types, unsigned int size,
+output_operand_type (FILE *table, enum operand_class class,
+ enum operand_instance instance,
+ const bitfield *types, unsigned int size,
enum stage stage, const char *indent)
{
unsigned int i;
- fprintf (table, "{ { ");
+ fprintf (table, "{ { %d, %d, ", class, instance);
for (i = 0; i < size - 1; i++)
{
- if (((i + 1) % 20) != 0)
+ if (((i + 3) % 20) != 0)
fprintf (table, "%d, ", types[i].value);
else
fprintf (table, "%d,", types[i].value);
- if (((i + 1) % 20) == 0)
+ if (((i + 3) % 20) == 0)
{
/* We need \\ for macro. */
if (stage == stage_macros)
const char *indent, int lineno)
{
char *str, *next, *last;
+ enum operand_class class = ClassNone;
+ enum operand_instance instance = InstanceNone;
bitfield types [ARRAY_SIZE (operand_types)];
/* Copy the default operand type. */
for (next = op; next && next < last; )
{
str = next_field (next, '|', &next, last);
+ if (str)
+ {
+ unsigned int i;
+
+ if (!strncmp(str, "Class=", 6))
+ {
+ for (i = 0; i < ARRAY_SIZE(operand_classes); ++i)
+ if (!strcmp(str + 6, operand_classes[i].name))
+ {
+ class = operand_classes[i].value;
+ str = NULL;
+ break;
+ }
+ }
+
+ if (str && !strncmp(str, "Instance=", 9))
+ {
+ for (i = 0; i < ARRAY_SIZE(operand_instances); ++i)
+ if (!strcmp(str + 9, operand_instances[i].name))
+ {
+ instance = operand_instances[i].value;
+ str = NULL;
+ break;
+ }
+ }
+ }
if (str)
{
set_bitfield (str, types, 1, ARRAY_SIZE (types), lineno);
if (!active_cpu_flags.bitfield.cpu64
&& !active_cpu_flags.bitfield.cpumpx)
set_bitfield("Disp16", types, 1, ARRAY_SIZE (types), lineno);
- set_bitfield("Disp32", types, 1, ARRAY_SIZE (types), lineno);
+ if (!active_cpu_flags.bitfield.cpu64)
+ set_bitfield("Disp32", types, 1, ARRAY_SIZE (types), lineno);
if (!active_cpu_flags.bitfield.cpuno64)
set_bitfield("Disp32S", types, 1, ARRAY_SIZE (types), lineno);
}
}
- output_operand_type (table, types, ARRAY_SIZE (types), stage,
- indent);
+ output_operand_type (table, class, instance, types, ARRAY_SIZE (types),
+ stage, indent);
}
static void
}
fprintf (table, " { \"%s\", %s, %s, %s, %s,\n",
- name, operands, base_opcode, extension_opcode,
- opcode_length);
+ name, base_opcode, extension_opcode, opcode_length, operands);
process_i386_cpu_flag (table, cpu_flags, 0, ",", " ", lineno);
/* Check the unused bitfield in i386_operand_type. */
#ifdef OTUnused
- static_assert (ARRAY_SIZE (operand_types) == OTNum + 1);
+ static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH + INSTANCE_WIDTH
+ == OTNum + 1);
#else
- static_assert (ARRAY_SIZE (operand_types) == OTNum);
+ static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH + INSTANCE_WIDTH
+ == OTNum);
- c = OTNumOfBits - OTMax - 1;
+ c = OTNumOfBits - OTNum;
if (c)
fail (_("%d unused bits in i386_operand_type.\n"), c);
#endif
projects / deliverable / binutils-gdb.git / blobdiff