x86: replace NoRex64 on VEX-encoded insns

[deliverable/binutils-gdb.git] / opcodes / i386-gen.c

diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 9844225cd023f9b69e21fd1c237b04b0a77162c9..6decc4b1b35985e8c393b439854687c77b631065 100644 (file)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2007-2019 Free Software Foundation, Inc.
+/* Copyright (C) 2007-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -90,9 +90,9 @@ static initializer cpu_flag_init[] =
   { "CPU_K8_FLAGS",
     "CPU_ATHLON_FLAGS|CpuRdtscp|CPU_SSE2_FLAGS|CpuLM" },
   { "CPU_AMDFAM10_FLAGS",
-    "CPU_K8_FLAGS|CpuFISTTP|CPU_SSE4A_FLAGS|CpuABM" },
+    "CPU_K8_FLAGS|CpuFISTTP|CPU_SSE4A_FLAGS|CpuLZCNT|CpuPOPCNT" },
   { "CPU_BDVER1_FLAGS",
-    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_XOP_FLAGS|CpuABM|CpuLWP|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_XOP_FLAGS|CpuLZCNT|CpuPOPCNT|CpuLWP|CpuSVME|CpuAES|CpuPCLMUL|CpuPRFCHW" },
   { "CPU_BDVER2_FLAGS",
     "CPU_BDVER1_FLAGS|CpuFMA|CpuBMI|CpuTBM|CpuF16C" },
   { "CPU_BDVER3_FLAGS",
@@ -100,11 +100,11 @@ static initializer cpu_flag_init[] =
   { "CPU_BDVER4_FLAGS",
     "CPU_BDVER3_FLAGS|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
   { "CPU_ZNVER1_FLAGS",
-    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
+    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuLZCNT|CpuPOPCNT|CpuSVME|CpuAES|CpuPCLMUL|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
   { "CPU_ZNVER2_FLAGS",
     "CPU_ZNVER1_FLAGS|CpuCLWB|CpuRDPID|CpuRDPRU|CpuMCOMMIT|CpuWBNOINVD" },
   { "CPU_BTVER1_FLAGS",
-    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuABM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
+    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuLZCNT|CpuPOPCNT|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME" },
   { "CPU_BTVER2_FLAGS",
     "CPU_BTVER1_FLAGS|CPU_AVX_FLAGS|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuMovbe|CpuXsaveopt|CpuPRFCHW" },
   { "CPU_8087_FLAGS",
@@ -138,7 +138,7 @@ static initializer cpu_flag_init[] =
   { "CPU_SSE4_1_FLAGS",
     "CPU_SSSE3_FLAGS|CpuSSE4_1" },
   { "CPU_SSE4_2_FLAGS",
-    "CPU_SSE4_1_FLAGS|CpuSSE4_2" },
+    "CPU_SSE4_1_FLAGS|CpuSSE4_2|CpuPOPCNT" },
   { "CPU_VMX_FLAGS",
     "CpuVMX" },
   { "CPU_SMX_FLAGS",
@@ -181,6 +181,8 @@ static initializer cpu_flag_init[] =
     "CpuBMI2" },
   { "CPU_LZCNT_FLAGS",
     "CpuLZCNT" },
+  { "CPU_POPCNT_FLAGS",
+    "CpuPOPCNT" },
   { "CPU_HLE_FLAGS",
     "CpuHLE" },
   { "CPU_RTM_FLAGS",
@@ -200,7 +202,7 @@ static initializer cpu_flag_init[] =
   { "CPU_SSE4A_FLAGS",
     "CPU_SSE3_FLAGS|CpuSSE4a" },
   { "CPU_ABM_FLAGS",
-    "CpuABM" },
+    "CpuLZCNT|CpuPOPCNT" },
   { "CPU_AVX_FLAGS",
     "CPU_SSE4_2_FLAGS|CPU_XSAVE_FLAGS|CpuAVX" },
   { "CPU_AVX2_FLAGS",
@@ -307,6 +309,8 @@ static initializer cpu_flag_init[] =
     "CpuRDPRU" },
   { "CPU_MCOMMIT_FLAGS",
     "CpuMCOMMIT" },
+  { "CPU_SEV_ES_FLAGS",
+    "CpuSEV_ES" },
   { "CPU_ANY_X87_FLAGS",
     "CPU_ANY_287_FLAGS|Cpu8087" },
   { "CPU_ANY_287_FLAGS",
@@ -322,17 +326,19 @@ static initializer cpu_flag_init[] =
   { "CPU_ANY_MMX_FLAGS",
     "CPU_3DNOWA_FLAGS" },
   { "CPU_ANY_SSE_FLAGS",
-    "CPU_ANY_SSE2_FLAGS|CpuSSE|CpuSSE4a" },
+    "CPU_ANY_SSE2_FLAGS|CpuSSE" },
   { "CPU_ANY_SSE2_FLAGS",
     "CPU_ANY_SSE3_FLAGS|CpuSSE2" },
   { "CPU_ANY_SSE3_FLAGS",
-    "CPU_ANY_SSSE3_FLAGS|CpuSSE3" },
+    "CPU_ANY_SSSE3_FLAGS|CpuSSE3|CpuSSE4a" },
   { "CPU_ANY_SSSE3_FLAGS",
     "CPU_ANY_SSE4_1_FLAGS|CpuSSSE3" },
   { "CPU_ANY_SSE4_1_FLAGS",
     "CPU_ANY_SSE4_2_FLAGS|CpuSSE4_1" },
   { "CPU_ANY_SSE4_2_FLAGS",
     "CpuSSE4_2" },
+  { "CPU_ANY_SSE4A_FLAGS",
+    "CpuSSE4a" },
   { "CPU_ANY_AVX_FLAGS",
     "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" },
   { "CPU_ANY_AVX2_FLAGS",
@@ -422,9 +428,9 @@ static initializer operand_type_init[] =
   { "OPERAND_TYPE_DISP64",
     "Disp64" },
   { "OPERAND_TYPE_INOUTPORTREG",
-    "InOutPortReg" },
+    "Instance=RegD|Word" },
   { "OPERAND_TYPE_SHIFTCOUNT",
-    "ShiftCount" },
+    "Instance=RegC|Byte" },
   { "OPERAND_TYPE_CONTROL",
     "Class=RegCR" },
   { "OPERAND_TYPE_TEST",
@@ -434,11 +440,9 @@ static initializer operand_type_init[] =
   { "OPERAND_TYPE_FLOATREG",
     "Class=Reg|Tbyte" },
   { "OPERAND_TYPE_FLOATACC",
-    "Acc|Tbyte" },
+    "Instance=Accum|Tbyte" },
   { "OPERAND_TYPE_SREG",
     "Class=SReg" },
-  { "OPERAND_TYPE_JUMPABSOLUTE",
-    "JumpAbsolute" },
   { "OPERAND_TYPE_REGMMX",
     "Class=RegMMX" },
   { "OPERAND_TYPE_REGXMM",
@@ -448,17 +452,17 @@ static initializer operand_type_init[] =
   { "OPERAND_TYPE_REGZMM",
     "Class=RegSIMD|Zmmword" },
   { "OPERAND_TYPE_REGMASK",
-    "RegMask" },
-  { "OPERAND_TYPE_ESSEG",
-    "EsSeg" },
+    "Class=RegMask" },
+  { "OPERAND_TYPE_REGBND",
+    "Class=RegBND" },
   { "OPERAND_TYPE_ACC8",
-    "Acc|Byte" },
+    "Instance=Accum|Byte" },
   { "OPERAND_TYPE_ACC16",
-    "Acc|Word" },
+    "Instance=Accum|Word" },
   { "OPERAND_TYPE_ACC32",
-    "Acc|Dword" },
+    "Instance=Accum|Dword" },
   { "OPERAND_TYPE_ACC64",
-    "Acc|Qword" },
+    "Instance=Accum|Qword" },
   { "OPERAND_TYPE_DISP16_32",
     "Disp16|Disp32" },
   { "OPERAND_TYPE_ANYDISP",
@@ -481,8 +485,6 @@ static initializer operand_type_init[] =
     "Imm32|Imm32S|Imm64|Disp32|Disp64" },
   { "OPERAND_TYPE_ANYIMM",
     "Imm1|Imm8|Imm8S|Imm16|Imm32|Imm32S|Imm64" },
-  { "OPERAND_TYPE_REGBND",
-    "RegBND" },
 };
 
 typedef struct bitfield
@@ -538,7 +540,6 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuSVME),
   BITFIELD (CpuVMX),
   BITFIELD (CpuSMX),
-  BITFIELD (CpuABM),
   BITFIELD (CpuXsave),
   BITFIELD (CpuXsaveopt),
   BITFIELD (CpuAES),
@@ -559,6 +560,7 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuF16C),
   BITFIELD (CpuBMI2),
   BITFIELD (CpuLZCNT),
+  BITFIELD (CpuPOPCNT),
   BITFIELD (CpuHLE),
   BITFIELD (CpuRTM),
   BITFIELD (CpuINVPCID),
@@ -606,6 +608,7 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuENQCMD),
   BITFIELD (CpuRDPRU),
   BITFIELD (CpuMCOMMIT),
+  BITFIELD (CpuSEV_ES),
 #ifdef CpuUnused
   BITFIELD (CpuUnused),
 #endif
@@ -617,17 +620,13 @@ static bitfield opcode_modifiers[] =
   BITFIELD (W),
   BITFIELD (Load),
   BITFIELD (Modrm),
-  BITFIELD (ShortForm),
   BITFIELD (Jump),
-  BITFIELD (JumpDword),
-  BITFIELD (JumpByte),
-  BITFIELD (JumpInterSegment),
   BITFIELD (FloatMF),
   BITFIELD (FloatR),
   BITFIELD (Size),
   BITFIELD (CheckRegSize),
-  BITFIELD (IgnoreSize),
-  BITFIELD (DefaultSize),
+  BITFIELD (MnemonicSize),
+  BITFIELD (Anysize),
   BITFIELD (No_bSuf),
   BITFIELD (No_wSuf),
   BITFIELD (No_lSuf),
@@ -650,7 +649,6 @@ static bitfield opcode_modifiers[] =
   BITFIELD (IsPrefix),
   BITFIELD (ImmExt),
   BITFIELD (NoRex64),
-  BITFIELD (Rex64),
   BITFIELD (Ugh),
   BITFIELD (Vex),
   BITFIELD (VexVVVV),
@@ -672,8 +670,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (ATTMnemonic),
   BITFIELD (ATTSyntax),
   BITFIELD (IntelSyntax),
-  BITFIELD (AMD64),
-  BITFIELD (Intel64),
+  BITFIELD (ISA64),
 };
 
 #define CLASS(n) #n, n
@@ -689,13 +686,28 @@ static const struct {
   CLASS (RegTR),
   CLASS (RegMMX),
   CLASS (RegSIMD),
+  CLASS (RegMask),
+  CLASS (RegBND),
 };
 
 #undef CLASS
 
+#define INSTANCE(n) #n, n
+
+static const struct {
+  const char *name;
+  enum operand_instance value;
+} operand_instances[] = {
+    INSTANCE (Accum),
+    INSTANCE (RegC),
+    INSTANCE (RegD),
+    INSTANCE (RegB),
+};
+
+#undef INSTANCE
+
 static bitfield operand_types[] =
 {
-  BITFIELD (RegMask),
   BITFIELD (Imm1),
   BITFIELD (Imm8),
   BITFIELD (Imm8S),
@@ -709,11 +721,6 @@ static bitfield operand_types[] =
   BITFIELD (Disp32),
   BITFIELD (Disp32S),
   BITFIELD (Disp64),
-  BITFIELD (InOutPortReg),
-  BITFIELD (ShiftCount),
-  BITFIELD (Acc),
-  BITFIELD (JumpAbsolute),
-  BITFIELD (EsSeg),
   BITFIELD (Byte),
   BITFIELD (Word),
   BITFIELD (Dword),
@@ -724,8 +731,6 @@ static bitfield operand_types[] =
   BITFIELD (Ymmword),
   BITFIELD (Zmmword),
   BITFIELD (Unspecified),
-  BITFIELD (Anysize),
-  BITFIELD (RegBND),
 #ifdef OTUnused
   BITFIELD (OTUnused),
 #endif
@@ -759,7 +764,7 @@ static void
 process_copyright (FILE *fp)
 {
   fprintf (fp, "/* This file is automatically generated by i386-gen.  Do not edit!  */\n\
-/* Copyright (C) 2007-2019 Free Software Foundation, Inc.\n\
+/* Copyright (C) 2007-2020 Free Software Foundation, Inc.\n\
 \n\
    This file is part of the GNU opcodes library.\n\
 \n\
@@ -1147,20 +1152,21 @@ enum stage {
 
 static void
 output_operand_type (FILE *table, enum operand_class class,
+                    enum operand_instance instance,
                     const bitfield *types, unsigned int size,
                     enum stage stage, const char *indent)
 {
   unsigned int i;
 
-  fprintf (table, "{ { %d, ", class);
+  fprintf (table, "{ { %d, %d, ", class, instance);
 
   for (i = 0; i < size - 1; i++)
     {
-      if (((i + 2) % 20) != 0)
+      if (((i + 3) % 20) != 0)
        fprintf (table, "%d, ", types[i].value);
       else
        fprintf (table, "%d,", types[i].value);
-      if (((i + 2) % 20) == 0)
+      if (((i + 3) % 20) == 0)
        {
          /* We need \\ for macro.  */
          if (stage == stage_macros)
@@ -1179,6 +1185,7 @@ process_i386_operand_type (FILE *table, char *op, enum stage stage,
 {
   char *str, *next, *last;
   enum operand_class class = ClassNone;
+  enum operand_instance instance = InstanceNone;
   bitfield types [ARRAY_SIZE (operand_types)];
 
   /* Copy the default operand type.  */
@@ -1206,6 +1213,17 @@ process_i386_operand_type (FILE *table, char *op, enum stage stage,
                        break;
                      }
                }
+
+             if (str && !strncmp(str, "Instance=", 9))
+               {
+                 for (i = 0; i < ARRAY_SIZE(operand_instances); ++i)
+                   if (!strcmp(str + 9, operand_instances[i].name))
+                     {
+                       instance = operand_instances[i].value;
+                       str = NULL;
+                       break;
+                     }
+               }
            }
          if (str)
            {
@@ -1221,13 +1239,14 @@ process_i386_operand_type (FILE *table, char *op, enum stage stage,
          if (!active_cpu_flags.bitfield.cpu64
              && !active_cpu_flags.bitfield.cpumpx)
            set_bitfield("Disp16", types, 1, ARRAY_SIZE (types), lineno);
-         set_bitfield("Disp32", types, 1, ARRAY_SIZE (types), lineno);
+         if (!active_cpu_flags.bitfield.cpu64)
+           set_bitfield("Disp32", types, 1, ARRAY_SIZE (types), lineno);
          if (!active_cpu_flags.bitfield.cpuno64)
            set_bitfield("Disp32S", types, 1, ARRAY_SIZE (types), lineno);
        }
     }
-  output_operand_type (table, class, types, ARRAY_SIZE (types), stage,
-                      indent);
+  output_operand_type (table, class, instance, types, ARRAY_SIZE (types),
+                      stage, indent);
 }
 
 static void
@@ -1717,11 +1736,13 @@ main (int argc, char **argv)
 
   /* Check the unused bitfield in i386_operand_type.  */
 #ifdef OTUnused
-  static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH == OTNum + 1);
+  static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH + INSTANCE_WIDTH
+                == OTNum + 1);
 #else
-  static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH == OTNum);
+  static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH + INSTANCE_WIDTH
+                == OTNum);
 
-  c = OTNumOfBits - OTMax - 1;
+  c = OTNumOfBits - OTNum;
   if (c)
     fail (_("%d unused bits in i386_operand_type.\n"), c);
 #endif