Make gdb::option::complete_options save processed arguments too

[deliverable/binutils-gdb.git] / opcodes / i386-gen.c

diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index b958e8b395135d578510e7b5d7a256c93070062c..6e457a8cc9770bce1e5af4293288b0a2bebc2ce0 100644 (file)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -1,4 +1,4 @@
-/* Copyright (C) 2007-2018 Free Software Foundation, Inc.
+/* Copyright (C) 2007-2019 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -231,6 +231,8 @@ static initializer cpu_flag_init[] =
     "CPU_AVX512F_FLAGS|CpuAVX512_VNNI" },
   { "CPU_AVX512_BITALG_FLAGS",
     "CPU_AVX512F_FLAGS|CpuAVX512_BITALG" },
+  { "CPU_AVX512_BF16_FLAGS",
+    "CPU_AVX512F_FLAGS|CpuAVX512_BF16" },
   { "CPU_L1OM_FLAGS",
     "unknown" },
   { "CPU_K1OM_FLAGS",
@@ -293,6 +295,10 @@ static initializer cpu_flag_init[] =
     "CpuMOVDIRI" },
   { "CPU_MOVDIR64B_FLAGS",
     "CpuMOVDIR64B" },
+  { "CPU_ENQCMD_FLAGS",
+    "CpuENQCMD" },
+  { "CPU_AVX512_VP2INTERSECT_FLAGS",
+    "CpuAVX512_VP2INTERSECT" },
   { "CPU_ANY_X87_FLAGS",
     "CPU_ANY_287_FLAGS|Cpu8087" },
   { "CPU_ANY_287_FLAGS",
@@ -322,9 +328,9 @@ static initializer cpu_flag_init[] =
   { "CPU_ANY_AVX_FLAGS",
     "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" },
   { "CPU_ANY_AVX2_FLAGS",
-    "CpuAVX2" },
+    "CPU_ANY_AVX512F_FLAGS|CpuAVX2" },
   { "CPU_ANY_AVX512F_FLAGS",
-    "CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512_VPOPCNTDQ|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG" },
+    "CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512_VPOPCNTDQ|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG|CpuAVX512_BF16|CpuAVX512_VP2INTERSECT" },
   { "CPU_ANY_AVX512CD_FLAGS",
     "CpuAVX512CD" },
   { "CPU_ANY_AVX512ER_FLAGS",
@@ -357,10 +363,16 @@ static initializer cpu_flag_init[] =
     "CpuAVX512_VNNI" },
   { "CPU_ANY_AVX512_BITALG_FLAGS",
     "CpuAVX512_BITALG" },
+  { "CPU_ANY_AVX512_BF16_FLAGS",
+    "CpuAVX512_BF16" },
   { "CPU_ANY_MOVDIRI_FLAGS",
     "CpuMOVDIRI" },
   { "CPU_ANY_MOVDIR64B_FLAGS",
     "CpuMOVDIR64B" },
+  { "CPU_ANY_ENQCMD_FLAGS",
+    "CpuENQCMD" },
+  { "CPU_ANY_AVX512_VP2INTERSECT_FLAGS",
+    "CpuAVX512_VP2INTERSECT" },
 };
 
 static const initializer operand_type_shorthands[] =
@@ -423,7 +435,7 @@ static initializer operand_type_init[] =
   { "OPERAND_TYPE_TEST",
     "Test" },
   { "OPERAND_TYPE_DEBUG",
-    "FloatReg" },
+    "Debug" },
   { "OPERAND_TYPE_FLOATREG",
     "FloatReg" },
   { "OPERAND_TYPE_FLOATACC",
@@ -432,8 +444,6 @@ static initializer operand_type_init[] =
     "SReg2" },
   { "OPERAND_TYPE_SREG3",
     "SReg3" },
-  { "OPERAND_TYPE_ACC",
-    "Acc" },
   { "OPERAND_TYPE_JUMPABSOLUTE",
     "JumpAbsolute" },
   { "OPERAND_TYPE_REGMMX",
@@ -448,10 +458,14 @@ static initializer operand_type_init[] =
     "RegMask" },
   { "OPERAND_TYPE_ESSEG",
     "EsSeg" },
+  { "OPERAND_TYPE_ACC8",
+    "Acc|Byte" },
+  { "OPERAND_TYPE_ACC16",
+    "Acc|Word" },
   { "OPERAND_TYPE_ACC32",
-    "Reg32|Acc|Dword" },
+    "Acc|Dword" },
   { "OPERAND_TYPE_ACC64",
-    "Reg64|Acc|Qword" },
+    "Acc|Qword" },
   { "OPERAND_TYPE_DISP16_32",
     "Disp16|Disp32" },
   { "OPERAND_TYPE_ANYDISP",
@@ -472,8 +486,6 @@ static initializer operand_type_init[] =
     "Imm32|Imm32S|Imm64|Disp32" },
   { "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
     "Imm32|Imm32S|Imm64|Disp32|Disp64" },
-  { "OPERAND_TYPE_VEC_IMM4",
-    "Vec_Imm4" },
   { "OPERAND_TYPE_REGBND",
     "RegBND" },
 };
@@ -578,6 +590,8 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuAVX512_VBMI2),
   BITFIELD (CpuAVX512_VNNI),
   BITFIELD (CpuAVX512_BITALG),
+  BITFIELD (CpuAVX512_BF16),
+  BITFIELD (CpuAVX512_VP2INTERSECT),
   BITFIELD (CpuMWAITX),
   BITFIELD (CpuCLZERO),
   BITFIELD (CpuOSPKE),
@@ -594,6 +608,7 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuCLDEMOTE),
   BITFIELD (CpuMOVDIRI),
   BITFIELD (CpuMOVDIR64B),
+  BITFIELD (CpuENQCMD),
 #ifdef CpuUnused
   BITFIELD (CpuUnused),
 #endif
@@ -612,9 +627,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (JumpInterSegment),
   BITFIELD (FloatMF),
   BITFIELD (FloatR),
-  BITFIELD (Size16),
-  BITFIELD (Size32),
-  BITFIELD (Size64),
+  BITFIELD (Size),
   BITFIELD (CheckRegSize),
   BITFIELD (IgnoreSize),
   BITFIELD (DefaultSize),
@@ -706,7 +719,6 @@ static bitfield operand_types[] =
   BITFIELD (Zmmword),
   BITFIELD (Unspecified),
   BITFIELD (Anysize),
-  BITFIELD (Vec_Imm4),
   BITFIELD (RegBND),
 #ifdef OTUnused
   BITFIELD (OTUnused),
@@ -741,7 +753,7 @@ static void
 process_copyright (FILE *fp)
 {
   fprintf (fp, "/* This file is automatically generated by i386-gen.  Do not edit!  */\n\
-/* Copyright (C) 2007-2018 Free Software Foundation, Inc.\n\
+/* Copyright (C) 2007-2019 Free Software Foundation, Inc.\n\
 \n\
    This file is part of the GNU opcodes library.\n\
 \n\