{ "CPU_ZNVER1_FLAGS",
"CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
{ "CPU_ZNVER2_FLAGS",
- "CPU_ZNVER1_FLAGS|CpuRDPID|CpuWBNOINVD|CpuCLWB" },
+ "CPU_ZNVER1_FLAGS|CpuCLWB|CpuRDPID|CpuRDPRU|CpuMCOMMIT|CpuWBNOINVD" },
{ "CPU_BTVER1_FLAGS",
"CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuABM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
{ "CPU_BTVER2_FLAGS",
"CpuENQCMD" },
{ "CPU_AVX512_VP2INTERSECT_FLAGS",
"CpuAVX512_VP2INTERSECT" },
+ { "CPU_RDPRU_FLAGS",
+ "CpuRDPRU" },
+ { "CPU_MCOMMIT_FLAGS",
+ "CpuMCOMMIT" },
{ "CPU_ANY_X87_FLAGS",
"CPU_ANY_287_FLAGS|Cpu8087" },
{ "CPU_ANY_287_FLAGS",
"CpuAVX512_VP2INTERSECT" },
};
-static const initializer operand_type_shorthands[] =
-{
- { "Reg8", "Reg|Byte" },
- { "Reg16", "Reg|Word" },
- { "Reg32", "Reg|Dword" },
- { "Reg64", "Reg|Qword" },
- { "FloatAcc", "Acc|Tbyte" },
- { "FloatReg", "Reg|Tbyte" },
- { "RegXMM", "RegSIMD|Xmmword" },
- { "RegYMM", "RegSIMD|Ymmword" },
- { "RegZMM", "RegSIMD|Zmmword" },
-};
-
static initializer operand_type_init[] =
{
{ "OPERAND_TYPE_NONE",
"0" },
{ "OPERAND_TYPE_REG8",
- "Reg8" },
+ "Class=Reg|Byte" },
{ "OPERAND_TYPE_REG16",
- "Reg16" },
+ "Class=Reg|Word" },
{ "OPERAND_TYPE_REG32",
- "Reg32" },
+ "Class=Reg|Dword" },
{ "OPERAND_TYPE_REG64",
- "Reg64" },
+ "Class=Reg|Qword" },
{ "OPERAND_TYPE_IMM1",
"Imm1" },
{ "OPERAND_TYPE_IMM8",
{ "OPERAND_TYPE_DEBUG",
"Debug" },
{ "OPERAND_TYPE_FLOATREG",
- "FloatReg" },
+ "Class=Reg|Tbyte" },
{ "OPERAND_TYPE_FLOATACC",
- "FloatAcc" },
+ "Acc|Tbyte" },
{ "OPERAND_TYPE_SREG",
"SReg" },
{ "OPERAND_TYPE_JUMPABSOLUTE",
{ "OPERAND_TYPE_REGMMX",
"RegMMX" },
{ "OPERAND_TYPE_REGXMM",
- "RegXMM" },
+ "RegSIMD|Xmmword" },
{ "OPERAND_TYPE_REGYMM",
- "RegYMM" },
+ "RegSIMD|Ymmword" },
{ "OPERAND_TYPE_REGZMM",
- "RegZMM" },
+ "RegSIMD|Zmmword" },
{ "OPERAND_TYPE_REGMASK",
"RegMask" },
{ "OPERAND_TYPE_ESSEG",
"Imm32|Imm32S|Imm64|Disp32" },
{ "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
"Imm32|Imm32S|Imm64|Disp32|Disp64" },
+ { "OPERAND_TYPE_ANYIMM",
+ "Imm1|Imm8|Imm8S|Imm16|Imm32|Imm32S|Imm64" },
{ "OPERAND_TYPE_REGBND",
"RegBND" },
};
BITFIELD (CpuMOVDIRI),
BITFIELD (CpuMOVDIR64B),
BITFIELD (CpuENQCMD),
+ BITFIELD (CpuRDPRU),
+ BITFIELD (CpuMCOMMIT),
#ifdef CpuUnused
BITFIELD (CpuUnused),
#endif
BITFIELD (Intel64),
};
+#define CLASS(n) #n, n
+
+static const struct {
+ const char *name;
+ enum operand_class value;
+} operand_classes[] = {
+ CLASS (Reg),
+};
+
+#undef CLASS
+
static bitfield operand_types[] =
{
- BITFIELD (Reg),
BITFIELD (RegMMX),
BITFIELD (RegSIMD),
BITFIELD (RegMask),
static void set_bitfield (char *, bitfield *, int, unsigned int, int);
static int
-set_bitfield_from_shorthand (char *f, bitfield *array, unsigned int size,
- int lineno)
+set_bitfield_from_cpu_flag_init (char *f, bitfield *array, unsigned int size,
+ int lineno)
{
char *str, *next, *last;
unsigned int i;
return 0;
}
- for (i = 0; i < ARRAY_SIZE (operand_type_shorthands); i++)
- if (strcmp (operand_type_shorthands[i].name, f) == 0)
- {
- /* Turn on selective bits. */
- char *init = xstrdup (operand_type_shorthands[i].init);
- last = init + strlen (init);
- for (next = init; next && next < last; )
- {
- str = next_field (next, '|', &next, last);
- if (str)
- set_bitfield (str, array, 1, size, lineno);
- }
- free (init);
- return 0;
- }
-
return -1;
}
}
}
- /* Handle shorthands. */
- if (value == 1 && !set_bitfield_from_shorthand (f, array, size, lineno))
+ /* Handle CPU_XXX_FLAGS. */
+ if (value == 1 && !set_bitfield_from_cpu_flag_init (f, array, size, lineno))
return;
if (lineno != -1)
};
static void
-output_operand_type (FILE *table, bitfield *types, unsigned int size,
+output_operand_type (FILE *table, enum operand_class class,
+ const bitfield *types, unsigned int size,
enum stage stage, const char *indent)
{
unsigned int i;
- fprintf (table, "{ { ");
+ fprintf (table, "{ { %d, ", class);
for (i = 0; i < size - 1; i++)
{
- if (((i + 1) % 20) != 0)
+ if (((i + 2) % 20) != 0)
fprintf (table, "%d, ", types[i].value);
else
fprintf (table, "%d,", types[i].value);
- if (((i + 1) % 20) == 0)
+ if (((i + 2) % 20) == 0)
{
/* We need \\ for macro. */
if (stage == stage_macros)
const char *indent, int lineno)
{
char *str, *next, *last;
+ enum operand_class class = ClassNone;
bitfield types [ARRAY_SIZE (operand_types)];
/* Copy the default operand type. */
for (next = op; next && next < last; )
{
str = next_field (next, '|', &next, last);
+ if (str)
+ {
+ unsigned int i;
+
+ if (!strncmp(str, "Class=", 6))
+ {
+ for (i = 0; i < ARRAY_SIZE(operand_classes); ++i)
+ if (!strcmp(str + 6, operand_classes[i].name))
+ {
+ class = operand_classes[i].value;
+ str = NULL;
+ break;
+ }
+ }
+ }
if (str)
{
set_bitfield (str, types, 1, ARRAY_SIZE (types), lineno);
set_bitfield("Disp32S", types, 1, ARRAY_SIZE (types), lineno);
}
}
- output_operand_type (table, types, ARRAY_SIZE (types), stage,
+ output_operand_type (table, class, types, ARRAY_SIZE (types), stage,
indent);
}
/* Check the unused bitfield in i386_operand_type. */
#ifdef OTUnused
- static_assert (ARRAY_SIZE (operand_types) == OTNum + 1);
+ static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH == OTNum + 1);
#else
- static_assert (ARRAY_SIZE (operand_types) == OTNum);
+ static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH == OTNum);
c = OTNumOfBits - OTMax - 1;
if (c)