-/* Copyright (C) 2007-2016 Free Software Foundation, Inc.
+/* Copyright (C) 2007-2018 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
"CPU_AVX512F_FLAGS|CpuAVX512_4FMAPS" },
{ "CPU_AVX512_4VNNIW_FLAGS",
"CPU_AVX512F_FLAGS|CpuAVX512_4VNNIW" },
+ { "CPU_AVX512_VPOPCNTDQ_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512_VPOPCNTDQ" },
+ { "CPU_AVX512_VBMI2_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512_VBMI2" },
+ { "CPU_AVX512_VNNI_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512_VNNI" },
+ { "CPU_AVX512_BITALG_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512_BITALG" },
{ "CPU_L1OM_FLAGS",
"unknown" },
{ "CPU_K1OM_FLAGS",
"CpuRDPID" },
{ "CPU_PTWRITE_FLAGS",
"CpuPTWRITE" },
+ { "CPU_IBT_FLAGS",
+ "CpuIBT" },
+ { "CPU_SHSTK_FLAGS",
+ "CpuSHSTK" },
+ { "CPU_GFNI_FLAGS",
+ "CpuGFNI" },
+ { "CPU_VAES_FLAGS",
+ "CpuVAES" },
+ { "CPU_VPCLMULQDQ_FLAGS",
+ "CpuVPCLMULQDQ" },
+ { "CPU_WBNOINVD_FLAGS",
+ "CpuWBNOINVD" },
+ { "CPU_PCONFIG_FLAGS",
+ "CpuPCONFIG" },
{ "CPU_ANY_X87_FLAGS",
"CPU_ANY_287_FLAGS|Cpu8087" },
{ "CPU_ANY_287_FLAGS",
{ "CPU_ANY_AVX2_FLAGS",
"CpuAVX2" },
{ "CPU_ANY_AVX512F_FLAGS",
- "CpuVREX|CpuRegZMM|CpuRegMask|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512F" },
+ "CpuVREX|CpuRegZMM|CpuRegMask|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512_VPOPCNTDQ|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG|CpuAVX512F" },
{ "CPU_ANY_AVX512CD_FLAGS",
"CpuAVX512CD" },
{ "CPU_ANY_AVX512ER_FLAGS",
"CpuAVX512_4FMAPS" },
{ "CPU_ANY_AVX512_4VNNIW_FLAGS",
"CpuAVX512_4VNNIW" },
+ { "CPU_ANY_AVX512_VPOPCNTDQ_FLAGS",
+ "CpuAVX512_VPOPCNTDQ" },
+ { "CPU_ANY_IBT_FLAGS",
+ "CpuIBT" },
+ { "CPU_ANY_SHSTK_FLAGS",
+ "CpuSHSTK" },
+ { "CPU_ANY_AVX512_VBMI2_FLAGS",
+ "CpuAVX512_VBMI2" },
+ { "CPU_ANY_AVX512_VNNI_FLAGS",
+ "CpuAVX512_VNNI" },
+ { "CPU_ANY_AVX512_BITALG_FLAGS",
+ "CpuAVX512_BITALG" },
+};
+
+static const initializer operand_type_shorthands[] =
+{
+ { "Reg8", "Reg|Byte" },
+ { "Reg16", "Reg|Word" },
+ { "Reg32", "Reg|Dword" },
+ { "Reg64", "Reg|Qword" },
+ { "FloatAcc", "Acc|Tbyte" },
+ { "FloatReg", "Reg|Tbyte" },
+ { "RegXMM", "RegSIMD|Xmmword" },
+ { "RegYMM", "RegSIMD|Ymmword" },
+ { "RegZMM", "RegSIMD|Zmmword" },
};
static initializer operand_type_init[] =
"Vec_Imm4" },
{ "OPERAND_TYPE_REGBND",
"RegBND" },
- { "OPERAND_TYPE_VEC_DISP8",
- "Vec_Disp8" },
};
typedef struct bitfield
BITFIELD (CpuAVX512VBMI),
BITFIELD (CpuAVX512_4FMAPS),
BITFIELD (CpuAVX512_4VNNIW),
+ BITFIELD (CpuAVX512_VPOPCNTDQ),
+ BITFIELD (CpuAVX512_VBMI2),
+ BITFIELD (CpuAVX512_VNNI),
+ BITFIELD (CpuAVX512_BITALG),
BITFIELD (CpuMWAITX),
BITFIELD (CpuCLZERO),
BITFIELD (CpuOSPKE),
BITFIELD (CpuRDPID),
BITFIELD (CpuPTWRITE),
+ BITFIELD (CpuIBT),
+ BITFIELD (CpuSHSTK),
+ BITFIELD (CpuGFNI),
+ BITFIELD (CpuVAES),
+ BITFIELD (CpuVPCLMULQDQ),
+ BITFIELD (CpuWBNOINVD),
+ BITFIELD (CpuPCONFIG),
BITFIELD (CpuRegMMX),
BITFIELD (CpuRegXMM),
BITFIELD (CpuRegYMM),
{
BITFIELD (D),
BITFIELD (W),
- BITFIELD (S),
+ BITFIELD (Load),
BITFIELD (Modrm),
BITFIELD (ShortForm),
BITFIELD (Jump),
BITFIELD (FWait),
BITFIELD (IsString),
BITFIELD (BNDPrefixOk),
+ BITFIELD (NoTrackPrefixOk),
BITFIELD (IsLockable),
BITFIELD (RegKludge),
- BITFIELD (FirstXmm0),
BITFIELD (Implicit1stXmm0),
BITFIELD (RepPrefixOk),
BITFIELD (HLEPrefixOk),
BITFIELD (Disp8MemShift),
BITFIELD (NoDefMask),
BITFIELD (ImplicitQuadGroup),
+ BITFIELD (Optimize),
BITFIELD (OldGcc),
BITFIELD (ATTMnemonic),
BITFIELD (ATTSyntax),
static bitfield operand_types[] =
{
- BITFIELD (Reg8),
- BITFIELD (Reg16),
- BITFIELD (Reg32),
- BITFIELD (Reg64),
- BITFIELD (FloatReg),
+ BITFIELD (Reg),
BITFIELD (RegMMX),
- BITFIELD (RegXMM),
- BITFIELD (RegYMM),
- BITFIELD (RegZMM),
+ BITFIELD (RegSIMD),
BITFIELD (RegMask),
BITFIELD (Imm1),
BITFIELD (Imm8),
BITFIELD (SReg2),
BITFIELD (SReg3),
BITFIELD (Acc),
- BITFIELD (FloatAcc),
BITFIELD (JumpAbsolute),
BITFIELD (EsSeg),
BITFIELD (RegMem),
BITFIELD (Anysize),
BITFIELD (Vec_Imm4),
BITFIELD (RegBND),
- BITFIELD (Vec_Disp8),
#ifdef OTUnused
BITFIELD (OTUnused),
#endif
};
static const char *filename;
+static i386_cpu_flags active_cpu_flags;
+static int active_isstring;
static int
compare (const void *x, const void *y)
va_list args;
va_start (args, message);
- fprintf (stderr, _("%s: Error: "), program_name);
+ fprintf (stderr, _("%s: error: "), program_name);
vfprintf (stderr, message, args);
va_end (args);
xexit (1);
process_copyright (FILE *fp)
{
fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\
-/* Copyright (C) 2007-2016 Free Software Foundation, Inc.\n\
+/* Copyright (C) 2007-2018 Free Software Foundation, Inc.\n\
\n\
This file is part of the GNU opcodes library.\n\
\n\
static void set_bitfield (char *, bitfield *, int, unsigned int, int);
static int
-set_bitfield_from_cpu_flag_init (char *f, bitfield *array,
- int value, unsigned int size,
- int lineno)
+set_bitfield_from_shorthand (char *f, bitfield *array, unsigned int size,
+ int lineno)
{
char *str, *next, *last;
unsigned int i;
return 0;
}
+ for (i = 0; i < ARRAY_SIZE (operand_type_shorthands); i++)
+ if (strcmp (operand_type_shorthands[i].name, f) == 0)
+ {
+ /* Turn on selective bits. */
+ char *init = xstrdup (operand_type_shorthands[i].init);
+ last = init + strlen (init);
+ for (next = init; next && next < last; )
+ {
+ str = next_field (next, '|', &next, last);
+ if (str)
+ set_bitfield (str, array, 1, size, lineno);
+ }
+ free (init);
+ return 0;
+ }
+
return -1;
}
}
}
- /* Handle CPU_XXX_FLAGS. */
- if (!set_bitfield_from_cpu_flag_init (f, array, value, size, lineno))
+ /* Handle shorthands. */
+ if (value == 1 && !set_bitfield_from_shorthand (f, array, size, lineno))
return;
if (lineno != -1)
- fail (_("%s: %d: Unknown bitfield: %s\n"), filename, lineno, f);
+ fail (_("%s: %d: unknown bitfield: %s\n"), filename, lineno, f);
else
- fail (_("Unknown bitfield: %s\n"), f);
+ fail (_("unknown bitfield: %s\n"), f);
}
static void
{
unsigned int i;
+ memset (&active_cpu_flags, 0, sizeof(active_cpu_flags));
+
fprintf (table, "%s{ { ", indent);
for (i = 0; i < size - 1; i++)
else
fprintf (table, "\n %s", indent);
}
+ if (flags[i].value)
+ active_cpu_flags.array[i / 32] |= 1U << (i % 32);
}
fprintf (table, "%d } }%s\n", flags[i].value, comma);
last -= 1;
next = flag + 2;
if (*last != ')')
- fail (_("%s: %d: Missing `)' in bitfield: %s\n"), filename,
+ fail (_("%s: %d: missing `)' in bitfield: %s\n"), filename,
lineno, flag);
*last = '\0';
}
char *str, *next, *last;
bitfield modifiers [ARRAY_SIZE (opcode_modifiers)];
+ active_isstring = 0;
+
/* Copy the default opcode modifier. */
memcpy (modifiers, opcode_modifiers, sizeof (modifiers));
{
str = next_field (next, '|', &next, last);
if (str)
- set_bitfield (str, modifiers, 1, ARRAY_SIZE (modifiers),
+ {
+ set_bitfield (str, modifiers, 1, ARRAY_SIZE (modifiers),
lineno);
+ if (strcasecmp(str, "IsString") == 0)
+ active_isstring = 1;
+ }
}
}
output_opcode_modifier (table, modifiers, ARRAY_SIZE (modifiers));
}
+enum stage {
+ stage_macros,
+ stage_opcodes,
+ stage_registers,
+};
+
static void
output_operand_type (FILE *table, bitfield *types, unsigned int size,
- int macro, const char *indent)
+ enum stage stage, const char *indent)
{
unsigned int i;
if (((i + 1) % 20) == 0)
{
/* We need \\ for macro. */
- if (macro)
+ if (stage == stage_macros)
fprintf (table, " \\\n%s", indent);
else
fprintf (table, "\n%s", indent);
}
static void
-process_i386_operand_type (FILE *table, char *op, int macro,
+process_i386_operand_type (FILE *table, char *op, enum stage stage,
const char *indent, int lineno)
{
char *str, *next, *last;
if (strcmp (op, "0"))
{
+ int baseindex = 0;
+
last = op + strlen (op);
for (next = op; next && next < last; )
{
str = next_field (next, '|', &next, last);
if (str)
- set_bitfield (str, types, 1, ARRAY_SIZE (types), lineno);
+ {
+ set_bitfield (str, types, 1, ARRAY_SIZE (types), lineno);
+ if (strcasecmp(str, "BaseIndex") == 0)
+ baseindex = 1;
+ }
+ }
+
+ if (stage == stage_opcodes && baseindex && !active_isstring)
+ {
+ set_bitfield("Disp8", types, 1, ARRAY_SIZE (types), lineno);
+ if (!active_cpu_flags.bitfield.cpu64
+ && !active_cpu_flags.bitfield.cpumpx)
+ set_bitfield("Disp16", types, 1, ARRAY_SIZE (types), lineno);
+ set_bitfield("Disp32", types, 1, ARRAY_SIZE (types), lineno);
+ if (!active_cpu_flags.bitfield.cpuno64)
+ set_bitfield("Disp32S", types, 1, ARRAY_SIZE (types), lineno);
}
}
- output_operand_type (table, types, ARRAY_SIZE (types), macro,
+ output_operand_type (table, types, ARRAY_SIZE (types), stage,
indent);
}
if (operand_types[i] == NULL || *operand_types[i] == '0')
{
if (i == 0)
- process_i386_operand_type (table, "0", 0, "\t ", lineno);
+ process_i386_operand_type (table, "0", stage_opcodes, "\t ",
+ lineno);
break;
}
if (i != 0)
fprintf (table, ",\n ");
- process_i386_operand_type (table, operand_types[i], 0,
+ process_i386_operand_type (table, operand_types[i], stage_opcodes,
"\t ", lineno);
}
fprintf (table, " } },\n");
process_i386_opcode_modifier (table, "0", -1);
fprintf (table, " { ");
- process_i386_operand_type (table, "0", 0, "\t ", -1);
+ process_i386_operand_type (table, "0", stage_opcodes, "\t ", -1);
fprintf (table, " } }\n");
fprintf (table, "};\n");
fprintf (table, " { \"%s\",\n ", reg_name);
- process_i386_operand_type (table, reg_type, 0, "\t", lineno);
+ process_i386_operand_type (table, reg_type, stage_registers, "\t",
+ lineno);
/* Find 32-bit Dwarf2 register number. */
dw2_32_num = next_field (str, ',', &str, last);
{
fprintf (fp, "\n\n#define %s \\\n ", operand_type_init[i].name);
init = xstrdup (operand_type_init[i].init);
- process_i386_operand_type (fp, init, 1, " ", -1);
+ process_i386_operand_type (fp, init, stage_macros, " ", -1);
free (init);
}
fprintf (fp, "\n");
projects / deliverable / binutils-gdb.git / blobdiff