gas/

[deliverable/binutils-gdb.git] / opcodes / i386-opc.c

diff --git a/opcodes/i386-opc.c b/opcodes/i386-opc.c
index e03152cca1a7607336fa6bf2aff40973df7733f5..b0f48846f0e7b1ae175304a2e0712ef8fd53facd 100644 (file)
--- a/opcodes/i386-opc.c
+++ b/opcodes/i386-opc.c
@@ -1444,10 +1444,10 @@ const template i386_optab[] =
 {"pcmpistrm", 3,  0x660f3a62,X, CpuSSE4_2, NoSuf|IgnoreSize|Modrm,     { Imm8, RegXMM|LLongMem, RegXMM } },
 /* We put non-8bit version before 8bit so that crc32 with memory operand
    defaults to non-8bit.  */
-{"crc32",     2,  0xf20f38f1,X, CpuSSE4_2, wl_Suf|Modrm,               { WordReg|WordMem, Reg32, 0 } },
-{"crc32",     2,  0xf20f38f1,X, CpuSSE4_2|Cpu64, q_Suf|IgnoreSize|Modrm|Rex64, { Reg64|LLongMem, Reg64, 0 } },
+{"crc32",     2,  0xf20f38f1,X, CpuSSE4_2, wl_Suf|Modrm,               { Reg16|Reg32|ShortMem|LongMem, Reg32, 0 } },
+{"crc32",     2,  0xf20f38f1,X, CpuSSE4_2|Cpu64, q_Suf|Modrm|Rex64,    { Reg64|LLongMem, Reg64, 0 } },
 {"crc32",     2,  0xf20f38f0,X, CpuSSE4_2, b_Suf|Modrm,                        { Reg8|ByteMem, Reg32, 0 } },
-{"crc32",     2,  0xf20f38f0,X, CpuSSE4_2|Cpu64, b_Suf|IgnoreSize|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0 } },
+{"crc32",     2,  0xf20f38f0,X, CpuSSE4_2|Cpu64, b_Suf|Modrm|Rex64,    { Reg8|ByteMem, Reg64, 0 } },
 
 /* AMD 3DNow! instructions.  */