/* Declarations for Intel 80386 opcode table
- Copyright 2007, 2008
+ Copyright 2007, 2008, 2009
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
#define Vex (Drexc + 1)
/* insn has 256bit VEX prefix. */
#define Vex256 (Vex + 1)
-/* insn has VEX NDS. Register-only source is encoded in Vex
- prefix. */
+/* insn has VEX NDS. Register-only source is encoded in Vex prefix.
+ We use VexNDS on insns with VEX DDS since the register-only source
+ is the second source register. */
#define VexNDS (Vex256 + 1)
/* insn has VEX NDD. Register destination is encoded in Vex
prefix. */